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30bb1ce712
Add a glue code for the MIPI I3C HCI on PCI bus with Intel Panther Lake I3C controller PCI IDs. MIPI I3C HCI on Intel platforms has additional logic around the MIPI I3C HCI core logic. Those together create so called I3C slice on PCI bus. Intel specific initialization code does a reset cycle to the I3C slice before probing the MIPI I3C HCI part. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20241231115904.620052-2-jarkko.nikula@linux.intel.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
9 lines
271 B
Makefile
9 lines
271 B
Makefile
# SPDX-License-Identifier: BSD-3-Clause
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obj-$(CONFIG_MIPI_I3C_HCI) += mipi-i3c-hci.o
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mipi-i3c-hci-y := core.o ext_caps.o pio.o dma.o \
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cmd_v1.o cmd_v2.o \
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dat_v1.o dct_v1.o \
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hci_quirks.o
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obj-$(CONFIG_MIPI_I3C_HCI_PCI) += mipi-i3c-hci-pci.o
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