mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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2c7c9c5db3
On Panther Lake platform (PTL), THC hardware introduces two new features for I2C subsystem: - Input max input size control - Input interrupt delay This patch adds above new advanced features into QuickI2C driver, and enables max input size control feature on PTL to improve QuickI2C driver compatibility. Signed-off-by: Even Xu <even.xu@intel.com> Tested-by: Chong Han <chong.han@intel.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
204 lines
6.3 KiB
C
204 lines
6.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2024 Intel Corporation */
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#ifndef _QUICKI2C_DEV_H_
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#define _QUICKI2C_DEV_H_
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#include <linux/hid-over-i2c.h>
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#include <linux/workqueue.h>
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#define PCI_DEVICE_ID_INTEL_THC_LNL_DEVICE_ID_I2C_PORT1 0xA848
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#define PCI_DEVICE_ID_INTEL_THC_LNL_DEVICE_ID_I2C_PORT2 0xA84A
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#define PCI_DEVICE_ID_INTEL_THC_PTL_H_DEVICE_ID_I2C_PORT1 0xE348
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#define PCI_DEVICE_ID_INTEL_THC_PTL_H_DEVICE_ID_I2C_PORT2 0xE34A
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#define PCI_DEVICE_ID_INTEL_THC_PTL_U_DEVICE_ID_I2C_PORT1 0xE448
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#define PCI_DEVICE_ID_INTEL_THC_PTL_U_DEVICE_ID_I2C_PORT2 0xE44A
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/* Packet size value, the unit is 16 bytes */
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#define MAX_PACKET_SIZE_VALUE_LNL 256
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/* HIDI2C special ACPI parameters DSD name */
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#define QUICKI2C_ACPI_METHOD_NAME_ICRS "ICRS"
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#define QUICKI2C_ACPI_METHOD_NAME_ISUB "ISUB"
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/* HIDI2C special ACPI parameters DSM methods */
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#define QUICKI2C_ACPI_REVISION_NUM 1
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#define QUICKI2C_ACPI_FUNC_NUM_HID_DESC_ADDR 1
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#define QUICKI2C_ACPI_FUNC_NUM_ACTIVE_LTR_VAL 1
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#define QUICKI2C_ACPI_FUNC_NUM_LP_LTR_VAL 2
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#define QUICKI2C_SUBIP_STANDARD_MODE_MAX_SPEED 100000
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#define QUICKI2C_SUBIP_FAST_MODE_MAX_SPEED 400000
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#define QUICKI2C_SUBIP_FASTPLUS_MODE_MAX_SPEED 1000000
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#define QUICKI2C_SUBIP_HIGH_SPEED_MODE_MAX_SPEED 3400000
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#define QUICKI2C_DEFAULT_ACTIVE_LTR_VALUE 5
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#define QUICKI2C_DEFAULT_LP_LTR_VALUE 500
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#define QUICKI2C_RPM_TIMEOUT_MS 500
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/* PTL Max packet size detection capability is 255 Bytes */
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#define MAX_RX_DETECT_SIZE_PTL 255
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/* Default interrupt delay is 1ms, suitable for most devices */
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#define DEFAULT_INTERRUPT_DELAY_US (1 * USEC_PER_MSEC)
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/*
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* THC uses runtime auto suspend to dynamically switch between THC active LTR
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* and low power LTR to save CPU power.
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* Default value is 5000ms, that means if no touch event in this time, THC will
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* change to low power LTR mode.
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*/
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#define DEFAULT_AUTO_SUSPEND_DELAY_MS 5000
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enum quicki2c_dev_state {
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QUICKI2C_NONE,
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QUICKI2C_RESETING,
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QUICKI2C_RESETED,
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QUICKI2C_INITED,
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QUICKI2C_ENABLED,
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QUICKI2C_DISABLED,
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};
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enum {
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HIDI2C_ADDRESSING_MODE_7BIT,
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HIDI2C_ADDRESSING_MODE_10BIT,
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};
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/**
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* struct quicki2c_subip_acpi_parameter - QuickI2C ACPI DSD parameters
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* @device_address: I2C device slave address
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* @connection_speed: I2C device expected connection speed
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* @addressing_mode: I2C device slave address mode, 7bit or 10bit
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*
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* Those properties get from QUICKI2C_ACPI_METHOD_NAME_ICRS method, used for
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* Bus parameter.
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*/
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struct quicki2c_subip_acpi_parameter {
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u16 device_address;
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u64 connection_speed;
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u8 addressing_mode;
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} __packed;
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/**
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* struct quicki2c_subip_acpi_config - QuickI2C ACPI DSD parameters
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* @SMHX: Standard Mode (100 kbit/s) Serial Clock Line HIGH Period
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* @SMLX: Standard Mode (100 kbit/s) Serial Clock Line LOW Period
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* @SMTD: Standard Mode (100 kbit/s) Serial Data Line Transmit Hold Period
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* @SMRD: Standard Mode (100 kbit/s) Serial Data Receive Hold Period
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* @FMHX: Fast Mode (400 kbit/s) Serial Clock Line HIGH Period
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* @FMLX: Fast Mode (400 kbit/s) Serial Clock Line LOW Period
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* @FMTD: Fast Mode (400 kbit/s) Serial Data Line Transmit Hold Period
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* @FMRD: Fast Mode (400 kbit/s) Serial Data Line Receive Hold Period
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* @FMSL: Maximum length (in ic_clk_cycles) of suppressed spikes
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* in Standard Mode, Fast Mode and Fast Mode Plus
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* @FPHX: Fast Mode Plus (1Mbit/sec) Serial Clock Line HIGH Period
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* @FPLX: Fast Mode Plus (1Mbit/sec) Serial Clock Line LOW Period
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* @FPTD: Fast Mode Plus (1Mbit/sec) Serial Data Line Transmit HOLD Period
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* @FPRD: Fast Mode Plus (1Mbit/sec) Serial Data Line Receive HOLD Period
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* @HMHX: High Speed Mode Plus (3.4Mbits/sec) Serial Clock Line HIGH Period
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* @HMLX: High Speed Mode Plus (3.4Mbits/sec) Serial Clock Line LOW Period
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* @HMTD: High Speed Mode Plus (3.4Mbits/sec) Serial Data Line Transmit HOLD Period
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* @HMRD: High Speed Mode Plus (3.4Mbits/sec) Serial Data Line Receive HOLD Period
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* @HMSL: Maximum length (in ic_clk_cycles) of suppressed spikes in High Speed Mode
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*
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* Those properties get from QUICKI2C_ACPI_METHOD_NAME_ISUB method, used for
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* I2C timing configure.
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*/
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struct quicki2c_subip_acpi_config {
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u64 SMHX;
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u64 SMLX;
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u64 SMTD;
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u64 SMRD;
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u64 FMHX;
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u64 FMLX;
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u64 FMTD;
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u64 FMRD;
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u64 FMSL;
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u64 FPHX;
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u64 FPLX;
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u64 FPTD;
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u64 FPRD;
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u64 HMHX;
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u64 HMLX;
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u64 HMTD;
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u64 HMRD;
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u64 HMSL;
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};
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/**
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* struct quicki2c_ddata - Driver specific data for quicki2c device
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* @max_detect_size: Identify max packet size detect for rx
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* @interrupt_delay: Identify interrupt detect delay for rx
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*/
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struct quicki2c_ddata {
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u32 max_detect_size;
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u32 interrupt_delay;
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};
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struct device;
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struct pci_dev;
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struct thc_device;
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struct hid_device;
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struct acpi_device;
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/**
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* struct quicki2c_device - THC QuickI2C device struct
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* @dev: Point to kernel device
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* @pdev: Point to PCI device
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* @thc_hw: Point to THC device
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* @hid_dev: Point to HID device
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* @acpi_dev: Point to ACPI device
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* @ddata: Point to QuickI2C platform specific driver data
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* @state: THC I2C device state
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* @mem_addr: MMIO memory address
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* @dev_desc: Device descriptor for HIDI2C protocol
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* @i2c_slave_addr: HIDI2C device slave address
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* @hid_desc_addr: Register address for retrieve HID device descriptor
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* @active_ltr_val: THC active LTR value
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* @low_power_ltr_val: THC low power LTR value
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* @i2c_speed_mode: 0 - standard mode, 1 - fast mode, 2 - fast mode plus
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* @i2c_clock_hcnt: I2C CLK high period time (unit in cycle count)
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* @i2c_clock_lcnt: I2C CLK low period time (unit in cycle count)
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* @report_descriptor: Store a copy of device report descriptor
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* @input_buf: Store a copy of latest input report data
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* @report_buf: Store a copy of latest input/output report packet from set/get feature
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* @report_len: The length of input/output report packet
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* @reset_ack_wq: Workqueue for waiting reset response from device
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* @reset_ack: Indicate reset response received or not
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*/
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struct quicki2c_device {
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struct device *dev;
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struct pci_dev *pdev;
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struct thc_device *thc_hw;
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struct hid_device *hid_dev;
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struct acpi_device *acpi_dev;
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const struct quicki2c_ddata *ddata;
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enum quicki2c_dev_state state;
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void __iomem *mem_addr;
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struct hidi2c_dev_descriptor dev_desc;
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u8 i2c_slave_addr;
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u16 hid_desc_addr;
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u32 active_ltr_val;
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u32 low_power_ltr_val;
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u32 i2c_speed_mode;
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u32 i2c_clock_hcnt;
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u32 i2c_clock_lcnt;
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u8 *report_descriptor;
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u8 *input_buf;
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u8 *report_buf;
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u32 report_len;
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wait_queue_head_t reset_ack_wq;
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bool reset_ack;
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};
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#endif /* _QUICKI2C_DEV_H_ */
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