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c28bfb107d
Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Link: https://lore.kernel.org/r/20250617145159.3803852-7-alexander.usyskin@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
16 lines
259 B
C
16 lines
259 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright(c) 2019-2025 Intel Corporation. All rights reserved.
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*/
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#ifndef __XE_NVM_H__
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#define __XE_NVM_H__
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struct xe_device;
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int xe_nvm_init(struct xe_device *xe);
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void xe_nvm_fini(struct xe_device *xe);
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#endif
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