mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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i.MX8qxp Display Controller(DC) is comprised of three main components that include a blit engine for 2D graphics accelerations, display controller for display output processing, as well as a command sequencer. Add kernel mode setting support for the display controller part with two CRTCs and two primary planes(backed by FetchLayer and FetchWarp respectively). The registers of the display controller are accessed without command sequencer involved, instead just by using CPU. The command sequencer is supposed to be used by the blit engine. Reviewed-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Liu Ying <victor.liu@nxp.com> Link: https://lore.kernel.org/r/20250414035028.1561475-13-victor.liu@nxp.com
103 lines
2.7 KiB
C
103 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2024 NXP
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*/
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#ifndef __DC_DRV_H__
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#define __DC_DRV_H__
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#include <linux/container_of.h>
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#include <linux/ioport.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include <drm/drm_device.h>
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#include <drm/drm_encoder.h>
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#include "dc-de.h"
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#include "dc-kms.h"
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#include "dc-pe.h"
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/**
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* struct dc_drm_device - DC specific drm_device
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*/
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struct dc_drm_device {
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/** @base: base drm_device structure */
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struct drm_device base;
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/** @dc_crtc: DC specific CRTC list */
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struct dc_crtc dc_crtc[DC_DISPLAYS];
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/** @dc_primary: DC specific primary plane list */
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struct dc_plane dc_primary[DC_DISPLAYS];
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/** @encoder: encoder list */
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struct drm_encoder encoder[DC_DISPLAYS];
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/** @cf_safe: constframe list(safety stream) */
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struct dc_cf *cf_safe[DC_DISPLAYS];
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/** @cf_cont: constframe list(content stream) */
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struct dc_cf *cf_cont[DC_DISPLAYS];
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/** @de: display engine list */
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struct dc_de *de[DC_DISPLAYS];
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/** @ed_safe: extdst list(safety stream) */
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struct dc_ed *ed_safe[DC_DISPLAYS];
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/** @ed_cont: extdst list(content stream) */
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struct dc_ed *ed_cont[DC_DISPLAYS];
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/** @fg: framegen list */
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struct dc_fg *fg[DC_DISPLAYS];
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/** @fu_disp: fetchunit list(used by display engine) */
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struct dc_fu *fu_disp[DC_DISP_FU_CNT];
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/** @lb: layerblend list */
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struct dc_lb *lb[DC_LB_CNT];
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/** @pe: pixel engine */
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struct dc_pe *pe;
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/** @tc: tcon list */
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struct dc_tc *tc[DC_DISPLAYS];
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};
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struct dc_subdev_info {
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resource_size_t reg_start;
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int id;
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};
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static inline struct dc_drm_device *to_dc_drm_device(struct drm_device *drm)
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{
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return container_of(drm, struct dc_drm_device, base);
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}
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int dc_crtc_init(struct dc_drm_device *dc_drm, int crtc_index);
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int dc_crtc_post_init(struct dc_drm_device *dc_drm, int crtc_index);
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int dc_kms_init(struct dc_drm_device *dc_drm);
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void dc_kms_uninit(struct dc_drm_device *dc_drm);
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int dc_plane_init(struct dc_drm_device *dc_drm, struct dc_plane *dc_plane);
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extern struct platform_driver dc_cf_driver;
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extern struct platform_driver dc_de_driver;
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extern struct platform_driver dc_ed_driver;
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extern struct platform_driver dc_fg_driver;
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extern struct platform_driver dc_fl_driver;
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extern struct platform_driver dc_fw_driver;
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extern struct platform_driver dc_ic_driver;
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extern struct platform_driver dc_lb_driver;
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extern struct platform_driver dc_pe_driver;
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extern struct platform_driver dc_tc_driver;
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static inline int dc_subdev_get_id(const struct dc_subdev_info *info,
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int info_cnt, struct resource *res)
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{
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int i;
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if (!res)
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return -EINVAL;
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for (i = 0; i < info_cnt; i++)
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if (info[i].reg_start == res->start)
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return info[i].id;
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return -EINVAL;
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}
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void dc_de_post_bind(struct dc_drm_device *dc_drm);
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void dc_pe_post_bind(struct dc_drm_device *dc_drm);
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#endif /* __DC_DRV_H__ */
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