mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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i.MX8qxp Display Controller display engine consists of all processing units that operate in a display clock domain. Add minimal feature support with FrameGen and TCon so that the engine can output display timings. The FrameGen driver, TCon driver and display engine driver are components to be aggregated by a master registered in the upcoming DRM driver. Reviewed-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20250414035028.1561475-10-victor.liu@nxp.com
178 lines
4.0 KiB
C
178 lines
4.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2024 NXP
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*/
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#include <linux/component.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include "dc-de.h"
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#include "dc-drv.h"
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#define POLARITYCTRL 0xc
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#define POLEN_HIGH BIT(2)
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static const struct dc_subdev_info dc_de_info[] = {
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{ .reg_start = 0x5618b400, .id = 0, },
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{ .reg_start = 0x5618b420, .id = 1, },
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};
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static const struct regmap_range dc_de_regmap_ranges[] = {
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regmap_reg_range(POLARITYCTRL, POLARITYCTRL),
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};
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static const struct regmap_access_table dc_de_regmap_access_table = {
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.yes_ranges = dc_de_regmap_ranges,
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.n_yes_ranges = ARRAY_SIZE(dc_de_regmap_ranges),
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};
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static const struct regmap_config dc_de_top_regmap_config = {
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.name = "top",
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.fast_io = true,
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.wr_table = &dc_de_regmap_access_table,
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.rd_table = &dc_de_regmap_access_table,
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.max_register = POLARITYCTRL,
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};
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static inline void dc_dec_init(struct dc_de *de)
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{
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regmap_write_bits(de->reg_top, POLARITYCTRL, POLARITYCTRL, POLEN_HIGH);
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}
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static int dc_de_bind(struct device *dev, struct device *master, void *data)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct dc_drm_device *dc_drm = data;
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struct resource *res_top;
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void __iomem *base_top;
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struct dc_de *de;
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int ret, id;
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de = devm_kzalloc(dev, sizeof(*de), GFP_KERNEL);
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if (!de)
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return -ENOMEM;
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base_top = devm_platform_get_and_ioremap_resource(pdev, 0, &res_top);
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if (IS_ERR(base_top))
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return PTR_ERR(base_top);
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de->reg_top = devm_regmap_init_mmio(dev, base_top,
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&dc_de_top_regmap_config);
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if (IS_ERR(de->reg_top))
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return PTR_ERR(de->reg_top);
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de->irq_shdload = platform_get_irq_byname(pdev, "shdload");
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if (de->irq_shdload < 0)
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return de->irq_shdload;
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de->irq_framecomplete = platform_get_irq_byname(pdev, "framecomplete");
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if (de->irq_framecomplete < 0)
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return de->irq_framecomplete;
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de->irq_seqcomplete = platform_get_irq_byname(pdev, "seqcomplete");
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if (de->irq_seqcomplete < 0)
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return de->irq_seqcomplete;
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de->dev = dev;
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dev_set_drvdata(dev, de);
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ret = devm_pm_runtime_enable(dev);
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if (ret)
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return ret;
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id = dc_subdev_get_id(dc_de_info, ARRAY_SIZE(dc_de_info), res_top);
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if (id < 0) {
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dev_err(dev, "failed to get instance number: %d\n", id);
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return id;
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}
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dc_drm->de[id] = de;
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return 0;
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}
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/*
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* It's possible to get the child device pointers from the child component
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* bind callbacks, but it depends on the component helper behavior to bind
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* the display engine component first. To avoid the dependency, post bind
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* to get the pointers from dc_drm in a safe manner.
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*/
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void dc_de_post_bind(struct dc_drm_device *dc_drm)
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{
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struct dc_de *de;
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int i;
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for (i = 0; i < DC_DISPLAYS; i++) {
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de = dc_drm->de[i];
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de->fg = dc_drm->fg[i];
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de->tc = dc_drm->tc[i];
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}
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}
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static const struct component_ops dc_de_ops = {
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.bind = dc_de_bind,
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};
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static int dc_de_probe(struct platform_device *pdev)
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{
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int ret;
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ret = devm_of_platform_populate(&pdev->dev);
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if (ret < 0)
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return ret;
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ret = component_add(&pdev->dev, &dc_de_ops);
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if (ret)
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return dev_err_probe(&pdev->dev, ret,
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"failed to add component\n");
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return 0;
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}
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static void dc_de_remove(struct platform_device *pdev)
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{
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component_del(&pdev->dev, &dc_de_ops);
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}
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static int dc_de_runtime_resume(struct device *dev)
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{
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struct dc_de *de = dev_get_drvdata(dev);
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dc_dec_init(de);
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dc_fg_init(de->fg);
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dc_tc_init(de->tc);
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return 0;
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}
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static const struct dev_pm_ops dc_de_pm_ops = {
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RUNTIME_PM_OPS(NULL, dc_de_runtime_resume, NULL)
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};
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static const struct of_device_id dc_de_dt_ids[] = {
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{ .compatible = "fsl,imx8qxp-dc-display-engine" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, dc_de_dt_ids);
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struct platform_driver dc_de_driver = {
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.probe = dc_de_probe,
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.remove = dc_de_remove,
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.driver = {
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.name = "imx8-dc-display-engine",
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.suppress_bind_attrs = true,
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.of_match_table = dc_de_dt_ids,
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.pm = pm_sleep_ptr(&dc_de_pm_ops),
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},
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};
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