mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-01 15:14:52 +00:00

non-drm: rust: - make ETIMEDOUT available - add size constants up to SZ_2G - add DMA coherent allocation bindings mtd: - driver for Intel GPU non-volatile storage i2c - designware quirk for Intel xe core: - atomic helpers: tune enable/disable sequences - add task info to wedge API - refactor EDID quirks - connector: move HDR sink to drm_display_info - fourcc: half-float and 32-bit float formats - mode_config: pass format info to simplify dma-buf: - heaps: Give CMA heap a stable name ci: - add device tree validation and kunit displayport: - change AUX DPCD access probe address - add quirk for DPCD probe - add panel replay definitions - backlight control helpers fbdev: - make CONFIG_FIRMWARE_EDID available on all arches fence: - fix UAF issues format-helper: - improve tests gpusvm: - introduce devmem only flag for allocation - add timeslicing support to GPU SVM ttm: - improve eviction sched: - tracing improvements - kunit improvements - memory leak fixes - reset handling improvements color mgmt: - add hardware gamma LUT handling helpers bridge: - add destroy hook - switch to reference counted drm_bridge allocations - tc358767: convert to devm_drm_bridge_alloc - improve CEC handling panel: - switch to reference counter drm_panel allocations - fwnode panel lookup - Huiling hl055fhv028c support - Raspberry Pi 7" 720x1280 support - edp: KDC KD116N3730A05, N160JCE-ELL CMN, N116BCJ-EAK - simple: AUO P238HAN01 - st7701: Winstar wf40eswaa6mnn0 - visionox: rm69299-shift - Renesas R61307, Renesas R69328 support - DJN HX83112B hdmi: - add CEC handling - YUV420 output support xe: - WildCat Lake support - Enable PanthorLake by default - mark BMG as SRIOV capable - update firmware recommendations - Expose media OA units - aux-bux support for non-volatile memory - MTD intel-dg driver for non-volatile memory - Expose fan control and voltage regulator in sysfs - restructure migration for multi-device - Restore GuC submit UAF fix - make GEM shrinker drm managed - SRIOV VF Post-migration recovery of GGTT nodes - W/A additions/reworks - Prefetch support for svm ranges - Don't allocate managed BO for each policy change - HWMON fixes for BMG - Create LRC BO without VM - PCI ID updates - make SLPC debugfs files optional - rework eviction rejection of bound external BOs - consolidate PAT programming logic for pre/post Xe2 - init changes for flicker-free boot - Enable GuC Dynamic Inhibit Context switch i915: - drm_panic support for i915/xe - initial flip queue off by default for LNL/PNL - Wildcat Lake Display support - Support for DSC fractional link bpp - Support for simultaneous Panel Replay and Adaptive sync - Support for PTL+ double buffer LUT - initial PIPEDMC event handling - drm_panel_follower support - DPLL interface renames - allocate struct intel_display dynamically - flip queue preperation - abstract DRAM detection better - avoid GuC scheduling stalls - remove DG1 force probe requirement - fix MEI interrupt handler on RT kernels - use backlight control helpers for eDP - more shared display code refactoring amdgpu: - add userq slot to INFO ioctl - SR-IOV hibernation support - Suspend improvements - Backlight improvements - Use scaling for non-native eDP modes - cleaner shader updates for GC 9.x - Remove fence slab - SDMA fw checks for userq support - RAS updates - DMCUB updates - DP tunneling fixes - Display idle D3 support - Per queue reset improvements - initial smartmux support amdkfd: - enable KFD on loongarch - mtype fix for ext coherent system memory radeon: - CS validation additional GL extensions - drop console lock during suspend/resume - bump driver version msm: - VM BIND support - CI: infrastructure updates - UBWC single source of truth - decouple GPU and KMS support - DP: rework I/O accessors - DPU: SM8750 support - DSI: SM8750 support - GPU: X1-45 support and speedbin support for X1-85 - MDSS: SM8750 support nova: - register! macro improvements - DMA object abstraction - VBIOS parser + fwsec lookup - sysmem flush page support - falcon: generic falcon boot code and HAL - FWSEC-FRTS: fb setup and load/execute ivpu: - Add Wildcat Lake support - Add turbo flag ast: - improve hardware generations implementation imx: - IMX8qxq Display Controller support lima: - Rockchip RK3528 GPU support nouveau: - fence handling cleanup panfrost: - MT8370 support - bo labeling - 64-bit register access qaic: - add RAS support rockchip: - convert inno_hdmi to a bridge rz-du: - add RZ/V2H(P) support - MIPI-DSI DCS support sitronix: - ST7567 support sun4i: - add H616 support tidss: - add TI AM62L support - AM65x OLDI bridge support bochs: - drm panic support vkms: - YUV and R* format support - use faux device vmwgfx: - fence improvements hyperv: - move out of simple - add drm_panic support -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEEKbZHaGwW9KfbeusDHTzWXnEhr4FAmiJM/0ACgkQDHTzWXnE hr6MpA/+JJKGdSdrE95QkaMcOZh/3e3areGXZ0V/RrrJXdB4/DoAfQSHhF0H7m7y MhBGVLGNMXq7KHrz28p1MjLHrE1mwmvJ6hZ4J076ed4u9naoCD0m6k5w5wiue+KL HyPR54ADxN0BYmgV0l/B0wj42KsHyTO4x4hdqPJu02V9Dtmx6FCh2ujkOF3p9nbK GMwWDttl4KEKljD0IvQ9YIYJ66crYGx/XmZi7JoWRrS104K/h1u8qZuXBp5jVKTy OZRAVyLdmJqdTOLH7l599MBBcEd/bNV37/LVwF4T5iFunEKOAiyN0QY0OR+IeRVh ZfOv2/gp4UNyIfyahQ7LKLgEilNPGHoPitvDJPvBZxW2UjwXVNvA1QfdK5DAlVRS D5NoFRjlFFCz8/c2hQwlKJ9o7eVgH3/pK0mwR7SPGQTuqzLFCrAfCuzUvg/gV++6 JFqmGKMHeCoxO2o4GMrwjFttStP41usxtV/D+grcbPteNO9UyKJS4C38n4eamJXM a9Sy9APuAb6F0w5+yMItEF7TQifgmhIbm5AZHlxE1KoDQV6TdiIf1Gou5LeDGoL6 OACbXHJPL52tUnfCRpbfI4tE/IVyYsfL01JnvZ5cZZWItXfcIz76ykJri+E0G60g yRl/zkimHKO4B0l/HSzal5xROXr+3VzeWehEiz/ot1VriP5OesA= =n9MO -----END PGP SIGNATURE----- Merge tag 'drm-next-2025-07-30' of https://gitlab.freedesktop.org/drm/kernel Pull drm updates from Dave Airlie: "Highlights: - Intel xe enable Panthor Lake, started adding WildCat Lake - amdgpu has a bunch of reset improvments along with the usual IP updates - msm got VM_BIND support which is important for vulkan sparse memory - more drm_panic users - gpusvm common code to handle a bunch of core SVM work outside drivers. Detail summary: Changes outside drm subdirectory: - 'shrink_shmem_memory()' for better shmem/hibernate interaction - Rust support infrastructure: - make ETIMEDOUT available - add size constants up to SZ_2G - add DMA coherent allocation bindings - mtd driver for Intel GPU non-volatile storage - i2c designware quirk for Intel xe core: - atomic helpers: tune enable/disable sequences - add task info to wedge API - refactor EDID quirks - connector: move HDR sink to drm_display_info - fourcc: half-float and 32-bit float formats - mode_config: pass format info to simplify dma-buf: - heaps: Give CMA heap a stable name ci: - add device tree validation and kunit displayport: - change AUX DPCD access probe address - add quirk for DPCD probe - add panel replay definitions - backlight control helpers fbdev: - make CONFIG_FIRMWARE_EDID available on all arches fence: - fix UAF issues format-helper: - improve tests gpusvm: - introduce devmem only flag for allocation - add timeslicing support to GPU SVM ttm: - improve eviction sched: - tracing improvements - kunit improvements - memory leak fixes - reset handling improvements color mgmt: - add hardware gamma LUT handling helpers bridge: - add destroy hook - switch to reference counted drm_bridge allocations - tc358767: convert to devm_drm_bridge_alloc - improve CEC handling panel: - switch to reference counter drm_panel allocations - fwnode panel lookup - Huiling hl055fhv028c support - Raspberry Pi 7" 720x1280 support - edp: KDC KD116N3730A05, N160JCE-ELL CMN, N116BCJ-EAK - simple: AUO P238HAN01 - st7701: Winstar wf40eswaa6mnn0 - visionox: rm69299-shift - Renesas R61307, Renesas R69328 support - DJN HX83112B hdmi: - add CEC handling - YUV420 output support xe: - WildCat Lake support - Enable PanthorLake by default - mark BMG as SRIOV capable - update firmware recommendations - Expose media OA units - aux-bux support for non-volatile memory - MTD intel-dg driver for non-volatile memory - Expose fan control and voltage regulator in sysfs - restructure migration for multi-device - Restore GuC submit UAF fix - make GEM shrinker drm managed - SRIOV VF Post-migration recovery of GGTT nodes - W/A additions/reworks - Prefetch support for svm ranges - Don't allocate managed BO for each policy change - HWMON fixes for BMG - Create LRC BO without VM - PCI ID updates - make SLPC debugfs files optional - rework eviction rejection of bound external BOs - consolidate PAT programming logic for pre/post Xe2 - init changes for flicker-free boot - Enable GuC Dynamic Inhibit Context switch i915: - drm_panic support for i915/xe - initial flip queue off by default for LNL/PNL - Wildcat Lake Display support - Support for DSC fractional link bpp - Support for simultaneous Panel Replay and Adaptive sync - Support for PTL+ double buffer LUT - initial PIPEDMC event handling - drm_panel_follower support - DPLL interface renames - allocate struct intel_display dynamically - flip queue preperation - abstract DRAM detection better - avoid GuC scheduling stalls - remove DG1 force probe requirement - fix MEI interrupt handler on RT kernels - use backlight control helpers for eDP - more shared display code refactoring amdgpu: - add userq slot to INFO ioctl - SR-IOV hibernation support - Suspend improvements - Backlight improvements - Use scaling for non-native eDP modes - cleaner shader updates for GC 9.x - Remove fence slab - SDMA fw checks for userq support - RAS updates - DMCUB updates - DP tunneling fixes - Display idle D3 support - Per queue reset improvements - initial smartmux support amdkfd: - enable KFD on loongarch - mtype fix for ext coherent system memory radeon: - CS validation additional GL extensions - drop console lock during suspend/resume - bump driver version msm: - VM BIND support - CI: infrastructure updates - UBWC single source of truth - decouple GPU and KMS support - DP: rework I/O accessors - DPU: SM8750 support - DSI: SM8750 support - GPU: X1-45 support and speedbin support for X1-85 - MDSS: SM8750 support nova: - register! macro improvements - DMA object abstraction - VBIOS parser + fwsec lookup - sysmem flush page support - falcon: generic falcon boot code and HAL - FWSEC-FRTS: fb setup and load/execute ivpu: - Add Wildcat Lake support - Add turbo flag ast: - improve hardware generations implementation imx: - IMX8qxq Display Controller support lima: - Rockchip RK3528 GPU support nouveau: - fence handling cleanup panfrost: - MT8370 support - bo labeling - 64-bit register access qaic: - add RAS support rockchip: - convert inno_hdmi to a bridge rz-du: - add RZ/V2H(P) support - MIPI-DSI DCS support sitronix: - ST7567 support sun4i: - add H616 support tidss: - add TI AM62L support - AM65x OLDI bridge support bochs: - drm panic support vkms: - YUV and R* format support - use faux device vmwgfx: - fence improvements hyperv: - move out of simple - add drm_panic support" * tag 'drm-next-2025-07-30' of https://gitlab.freedesktop.org/drm/kernel: (1479 commits) drm/tidss: oldi: convert to devm_drm_bridge_alloc() API drm/tidss: encoder: convert to devm_drm_bridge_alloc() drm/amdgpu: move reset support type checks into the caller drm/amdgpu/sdma7: re-emit unprocessed state on ring reset drm/amdgpu/sdma6: re-emit unprocessed state on ring reset drm/amdgpu/sdma5.2: re-emit unprocessed state on ring reset drm/amdgpu/sdma5: re-emit unprocessed state on ring reset drm/amdgpu/gfx12: re-emit unprocessed state on ring reset drm/amdgpu/gfx11: re-emit unprocessed state on ring reset drm/amdgpu/gfx10: re-emit unprocessed state on ring reset drm/amdgpu/gfx9.4.3: re-emit unprocessed state on kcq reset drm/amdgpu/gfx9: re-emit unprocessed state on kcq reset drm/amdgpu: Add WARN_ON to the resource clear function drm/amd/pm: Use cached metrics data on SMUv13.0.6 drm/amd/pm: Use cached data for min/max clocks gpu: nova-core: fix bounds check in PmuLookupTableEntry::new drm/amdgpu: Replace HQD terminology with slots naming drm/amdgpu: Add user queue instance count in HW IP info drm/amd/amdgpu: Add helper functions for isp buffers drm/amd/amdgpu: Initialize swnode for ISP MFD device ...
625 lines
14 KiB
C
625 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/* Copyright (c) 2023 Imagination Technologies Ltd. */
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#include "pvr_device.h"
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#include "pvr_fw.h"
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#include "pvr_fw_startstop.h"
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#include "pvr_power.h"
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#include "pvr_queue.h"
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#include "pvr_rogue_fwif.h"
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#include <drm/drm_drv.h>
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#include <drm/drm_managed.h>
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#include <linux/cleanup.h>
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#include <linux/clk.h>
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#include <linux/interrupt.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#include <linux/timer.h>
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#include <linux/types.h>
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#include <linux/workqueue.h>
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#define POWER_SYNC_TIMEOUT_US (1000000) /* 1s */
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#define WATCHDOG_TIME_MS (500)
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/**
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* pvr_device_lost() - Mark GPU device as lost
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* @pvr_dev: Target PowerVR device.
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*
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* This will cause the DRM device to be unplugged.
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*/
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void
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pvr_device_lost(struct pvr_device *pvr_dev)
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{
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if (!pvr_dev->lost) {
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pvr_dev->lost = true;
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drm_dev_unplug(from_pvr_device(pvr_dev));
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}
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}
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static int
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pvr_power_send_command(struct pvr_device *pvr_dev, struct rogue_fwif_kccb_cmd *pow_cmd)
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{
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struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev;
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u32 slot_nr;
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u32 value;
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int err;
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WRITE_ONCE(*fw_dev->power_sync, 0);
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err = pvr_kccb_send_cmd_powered(pvr_dev, pow_cmd, &slot_nr);
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if (err)
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return err;
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/* Wait for FW to acknowledge. */
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return readl_poll_timeout(pvr_dev->fw_dev.power_sync, value, value != 0, 100,
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POWER_SYNC_TIMEOUT_US);
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}
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static int
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pvr_power_request_idle(struct pvr_device *pvr_dev)
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{
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struct rogue_fwif_kccb_cmd pow_cmd;
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/* Send FORCED_IDLE request to FW. */
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pow_cmd.cmd_type = ROGUE_FWIF_KCCB_CMD_POW;
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pow_cmd.cmd_data.pow_data.pow_type = ROGUE_FWIF_POW_FORCED_IDLE_REQ;
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pow_cmd.cmd_data.pow_data.power_req_data.pow_request_type = ROGUE_FWIF_POWER_FORCE_IDLE;
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return pvr_power_send_command(pvr_dev, &pow_cmd);
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}
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static int
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pvr_power_request_pwr_off(struct pvr_device *pvr_dev)
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{
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struct rogue_fwif_kccb_cmd pow_cmd;
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/* Send POW_OFF request to firmware. */
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pow_cmd.cmd_type = ROGUE_FWIF_KCCB_CMD_POW;
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pow_cmd.cmd_data.pow_data.pow_type = ROGUE_FWIF_POW_OFF_REQ;
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pow_cmd.cmd_data.pow_data.power_req_data.forced = true;
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return pvr_power_send_command(pvr_dev, &pow_cmd);
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}
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static int
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pvr_power_fw_disable(struct pvr_device *pvr_dev, bool hard_reset)
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{
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if (!hard_reset) {
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int err;
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cancel_delayed_work_sync(&pvr_dev->watchdog.work);
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err = pvr_power_request_idle(pvr_dev);
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if (err)
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return err;
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err = pvr_power_request_pwr_off(pvr_dev);
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if (err)
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return err;
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}
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return pvr_fw_stop(pvr_dev);
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}
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static int
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pvr_power_fw_enable(struct pvr_device *pvr_dev)
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{
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int err;
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err = pvr_fw_start(pvr_dev);
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if (err)
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return err;
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err = pvr_wait_for_fw_boot(pvr_dev);
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if (err) {
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drm_err(from_pvr_device(pvr_dev), "Firmware failed to boot\n");
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pvr_fw_stop(pvr_dev);
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return err;
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}
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queue_delayed_work(pvr_dev->sched_wq, &pvr_dev->watchdog.work,
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msecs_to_jiffies(WATCHDOG_TIME_MS));
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return 0;
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}
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bool
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pvr_power_is_idle(struct pvr_device *pvr_dev)
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{
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/*
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* FW power state can be out of date if a KCCB command has been submitted but the FW hasn't
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* started processing it yet. So also check the KCCB status.
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*/
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enum rogue_fwif_pow_state pow_state = READ_ONCE(pvr_dev->fw_dev.fwif_sysdata->pow_state);
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bool kccb_idle = pvr_kccb_is_idle(pvr_dev);
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return (pow_state == ROGUE_FWIF_POW_IDLE) && kccb_idle;
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}
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static bool
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pvr_watchdog_kccb_stalled(struct pvr_device *pvr_dev)
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{
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/* Check KCCB commands are progressing. */
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u32 kccb_cmds_executed = pvr_dev->fw_dev.fwif_osdata->kccb_cmds_executed;
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bool kccb_is_idle = pvr_kccb_is_idle(pvr_dev);
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if (pvr_dev->watchdog.old_kccb_cmds_executed == kccb_cmds_executed && !kccb_is_idle) {
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pvr_dev->watchdog.kccb_stall_count++;
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/*
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* If we have commands pending with no progress for 2 consecutive polls then
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* consider KCCB command processing stalled.
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*/
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if (pvr_dev->watchdog.kccb_stall_count == 2) {
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pvr_dev->watchdog.kccb_stall_count = 0;
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return true;
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}
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} else if (pvr_dev->watchdog.old_kccb_cmds_executed == kccb_cmds_executed) {
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bool has_active_contexts;
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mutex_lock(&pvr_dev->queues.lock);
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has_active_contexts = list_empty(&pvr_dev->queues.active);
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mutex_unlock(&pvr_dev->queues.lock);
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if (has_active_contexts) {
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/* Send a HEALTH_CHECK command so we can verify FW is still alive. */
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struct rogue_fwif_kccb_cmd health_check_cmd;
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health_check_cmd.cmd_type = ROGUE_FWIF_KCCB_CMD_HEALTH_CHECK;
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pvr_kccb_send_cmd_powered(pvr_dev, &health_check_cmd, NULL);
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}
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} else {
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pvr_dev->watchdog.old_kccb_cmds_executed = kccb_cmds_executed;
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pvr_dev->watchdog.kccb_stall_count = 0;
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}
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return false;
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}
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static void
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pvr_watchdog_worker(struct work_struct *work)
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{
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struct pvr_device *pvr_dev = container_of(work, struct pvr_device,
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watchdog.work.work);
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bool stalled;
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if (pvr_dev->lost)
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return;
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if (pm_runtime_get_if_in_use(from_pvr_device(pvr_dev)->dev) <= 0)
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goto out_requeue;
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if (!pvr_dev->fw_dev.booted)
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goto out_pm_runtime_put;
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stalled = pvr_watchdog_kccb_stalled(pvr_dev);
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if (stalled) {
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drm_err(from_pvr_device(pvr_dev), "FW stalled, trying hard reset");
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pvr_power_reset(pvr_dev, true);
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/* Device may be lost at this point. */
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}
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out_pm_runtime_put:
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pm_runtime_put(from_pvr_device(pvr_dev)->dev);
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out_requeue:
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if (!pvr_dev->lost) {
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queue_delayed_work(pvr_dev->sched_wq, &pvr_dev->watchdog.work,
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msecs_to_jiffies(WATCHDOG_TIME_MS));
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}
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}
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/**
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* pvr_watchdog_init() - Initialise watchdog for device
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* @pvr_dev: Target PowerVR device.
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*
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* Returns:
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* * 0 on success, or
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* * -%ENOMEM on out of memory.
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*/
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int
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pvr_watchdog_init(struct pvr_device *pvr_dev)
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{
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INIT_DELAYED_WORK(&pvr_dev->watchdog.work, pvr_watchdog_worker);
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return 0;
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}
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int
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pvr_power_device_suspend(struct device *dev)
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{
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struct platform_device *plat_dev = to_platform_device(dev);
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struct drm_device *drm_dev = platform_get_drvdata(plat_dev);
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struct pvr_device *pvr_dev = to_pvr_device(drm_dev);
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int err = 0;
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int idx;
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if (!drm_dev_enter(drm_dev, &idx))
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return -EIO;
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if (pvr_dev->fw_dev.booted) {
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err = pvr_power_fw_disable(pvr_dev, false);
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if (err)
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goto err_drm_dev_exit;
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}
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clk_disable_unprepare(pvr_dev->mem_clk);
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clk_disable_unprepare(pvr_dev->sys_clk);
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clk_disable_unprepare(pvr_dev->core_clk);
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err = reset_control_assert(pvr_dev->reset);
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err_drm_dev_exit:
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drm_dev_exit(idx);
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return err;
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}
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int
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pvr_power_device_resume(struct device *dev)
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|
{
|
|
struct platform_device *plat_dev = to_platform_device(dev);
|
|
struct drm_device *drm_dev = platform_get_drvdata(plat_dev);
|
|
struct pvr_device *pvr_dev = to_pvr_device(drm_dev);
|
|
int idx;
|
|
int err;
|
|
|
|
if (!drm_dev_enter(drm_dev, &idx))
|
|
return -EIO;
|
|
|
|
err = clk_prepare_enable(pvr_dev->core_clk);
|
|
if (err)
|
|
goto err_drm_dev_exit;
|
|
|
|
err = clk_prepare_enable(pvr_dev->sys_clk);
|
|
if (err)
|
|
goto err_core_clk_disable;
|
|
|
|
err = clk_prepare_enable(pvr_dev->mem_clk);
|
|
if (err)
|
|
goto err_sys_clk_disable;
|
|
|
|
/*
|
|
* According to the hardware manual, a delay of at least 32 clock
|
|
* cycles is required between de-asserting the clkgen reset and
|
|
* de-asserting the GPU reset. Assuming a worst-case scenario with
|
|
* a very high GPU clock frequency, a delay of 1 microsecond is
|
|
* sufficient to ensure this requirement is met across all
|
|
* feasible GPU clock speeds.
|
|
*/
|
|
udelay(1);
|
|
|
|
err = reset_control_deassert(pvr_dev->reset);
|
|
if (err)
|
|
goto err_mem_clk_disable;
|
|
|
|
if (pvr_dev->fw_dev.booted) {
|
|
err = pvr_power_fw_enable(pvr_dev);
|
|
if (err)
|
|
goto err_reset_assert;
|
|
}
|
|
|
|
drm_dev_exit(idx);
|
|
|
|
return 0;
|
|
|
|
err_reset_assert:
|
|
reset_control_assert(pvr_dev->reset);
|
|
|
|
err_mem_clk_disable:
|
|
clk_disable_unprepare(pvr_dev->mem_clk);
|
|
|
|
err_sys_clk_disable:
|
|
clk_disable_unprepare(pvr_dev->sys_clk);
|
|
|
|
err_core_clk_disable:
|
|
clk_disable_unprepare(pvr_dev->core_clk);
|
|
|
|
err_drm_dev_exit:
|
|
drm_dev_exit(idx);
|
|
|
|
return err;
|
|
}
|
|
|
|
int
|
|
pvr_power_device_idle(struct device *dev)
|
|
{
|
|
struct platform_device *plat_dev = to_platform_device(dev);
|
|
struct drm_device *drm_dev = platform_get_drvdata(plat_dev);
|
|
struct pvr_device *pvr_dev = to_pvr_device(drm_dev);
|
|
|
|
return pvr_power_is_idle(pvr_dev) ? 0 : -EBUSY;
|
|
}
|
|
|
|
static int
|
|
pvr_power_clear_error(struct pvr_device *pvr_dev)
|
|
{
|
|
struct device *dev = from_pvr_device(pvr_dev)->dev;
|
|
int err;
|
|
|
|
/* Ensure the device state is known and nothing is happening past this point */
|
|
pm_runtime_disable(dev);
|
|
|
|
/* Attempt to clear the runtime PM error by setting the current state again */
|
|
if (pm_runtime_status_suspended(dev))
|
|
err = pm_runtime_set_suspended(dev);
|
|
else
|
|
err = pm_runtime_set_active(dev);
|
|
|
|
if (err) {
|
|
drm_err(from_pvr_device(pvr_dev),
|
|
"%s: Failed to clear runtime PM error (new error %d)\n",
|
|
__func__, err);
|
|
}
|
|
|
|
pm_runtime_enable(dev);
|
|
|
|
return err;
|
|
}
|
|
|
|
/**
|
|
* pvr_power_get_clear() - Acquire a power reference, correcting any errors
|
|
* @pvr_dev: Device pointer
|
|
*
|
|
* Attempt to acquire a power reference on the device. If the runtime PM
|
|
* is in error state, attempt to clear the error and retry.
|
|
*
|
|
* Returns:
|
|
* * 0 on success, or
|
|
* * Any error code returned by pvr_power_get() or the runtime PM API.
|
|
*/
|
|
static int
|
|
pvr_power_get_clear(struct pvr_device *pvr_dev)
|
|
{
|
|
int err;
|
|
|
|
err = pvr_power_get(pvr_dev);
|
|
if (err == 0)
|
|
return err;
|
|
|
|
drm_warn(from_pvr_device(pvr_dev),
|
|
"%s: pvr_power_get returned error %d, attempting recovery\n",
|
|
__func__, err);
|
|
|
|
err = pvr_power_clear_error(pvr_dev);
|
|
if (err)
|
|
return err;
|
|
|
|
return pvr_power_get(pvr_dev);
|
|
}
|
|
|
|
/**
|
|
* pvr_power_reset() - Reset the GPU
|
|
* @pvr_dev: Device pointer
|
|
* @hard_reset: %true for hard reset, %false for soft reset
|
|
*
|
|
* If @hard_reset is %false and the FW processor fails to respond during the reset process, this
|
|
* function will attempt a hard reset.
|
|
*
|
|
* If a hard reset fails then the GPU device is reported as lost.
|
|
*
|
|
* Returns:
|
|
* * 0 on success, or
|
|
* * Any error code returned by pvr_power_get, pvr_power_fw_disable or pvr_power_fw_enable().
|
|
*/
|
|
int
|
|
pvr_power_reset(struct pvr_device *pvr_dev, bool hard_reset)
|
|
{
|
|
bool queues_disabled = false;
|
|
int err;
|
|
|
|
/*
|
|
* Take a power reference during the reset. This should prevent any interference with the
|
|
* power state during reset.
|
|
*/
|
|
WARN_ON(pvr_power_get_clear(pvr_dev));
|
|
|
|
down_write(&pvr_dev->reset_sem);
|
|
|
|
if (pvr_dev->lost) {
|
|
err = -EIO;
|
|
goto err_up_write;
|
|
}
|
|
|
|
/* Disable IRQs for the duration of the reset. */
|
|
disable_irq(pvr_dev->irq);
|
|
|
|
do {
|
|
if (hard_reset) {
|
|
pvr_queue_device_pre_reset(pvr_dev);
|
|
queues_disabled = true;
|
|
}
|
|
|
|
err = pvr_power_fw_disable(pvr_dev, hard_reset);
|
|
if (!err) {
|
|
if (hard_reset) {
|
|
pvr_dev->fw_dev.booted = false;
|
|
WARN_ON(pvr_power_device_suspend(from_pvr_device(pvr_dev)->dev));
|
|
|
|
err = pvr_fw_hard_reset(pvr_dev);
|
|
if (err)
|
|
goto err_device_lost;
|
|
|
|
err = pvr_power_device_resume(from_pvr_device(pvr_dev)->dev);
|
|
pvr_dev->fw_dev.booted = true;
|
|
if (err)
|
|
goto err_device_lost;
|
|
} else {
|
|
/* Clear the FW faulted flags. */
|
|
pvr_dev->fw_dev.fwif_sysdata->hwr_state_flags &=
|
|
~(ROGUE_FWIF_HWR_FW_FAULT |
|
|
ROGUE_FWIF_HWR_RESTART_REQUESTED);
|
|
}
|
|
|
|
pvr_fw_irq_clear(pvr_dev);
|
|
|
|
err = pvr_power_fw_enable(pvr_dev);
|
|
}
|
|
|
|
if (err && hard_reset)
|
|
goto err_device_lost;
|
|
|
|
if (err && !hard_reset) {
|
|
drm_err(from_pvr_device(pvr_dev), "FW stalled, trying hard reset");
|
|
hard_reset = true;
|
|
}
|
|
} while (err);
|
|
|
|
if (queues_disabled)
|
|
pvr_queue_device_post_reset(pvr_dev);
|
|
|
|
enable_irq(pvr_dev->irq);
|
|
|
|
up_write(&pvr_dev->reset_sem);
|
|
|
|
pvr_power_put(pvr_dev);
|
|
|
|
return 0;
|
|
|
|
err_device_lost:
|
|
drm_err(from_pvr_device(pvr_dev), "GPU device lost");
|
|
pvr_device_lost(pvr_dev);
|
|
|
|
/* Leave IRQs disabled if the device is lost. */
|
|
|
|
if (queues_disabled)
|
|
pvr_queue_device_post_reset(pvr_dev);
|
|
|
|
err_up_write:
|
|
up_write(&pvr_dev->reset_sem);
|
|
|
|
pvr_power_put(pvr_dev);
|
|
|
|
return err;
|
|
}
|
|
|
|
/**
|
|
* pvr_watchdog_fini() - Shutdown watchdog for device
|
|
* @pvr_dev: Target PowerVR device.
|
|
*/
|
|
void
|
|
pvr_watchdog_fini(struct pvr_device *pvr_dev)
|
|
{
|
|
cancel_delayed_work_sync(&pvr_dev->watchdog.work);
|
|
}
|
|
|
|
int pvr_power_domains_init(struct pvr_device *pvr_dev)
|
|
{
|
|
struct device *dev = from_pvr_device(pvr_dev)->dev;
|
|
|
|
struct device_link **domain_links __free(kfree) = NULL;
|
|
struct device **domain_devs __free(kfree) = NULL;
|
|
int domain_count;
|
|
int link_count;
|
|
|
|
char dev_name[2] = "a";
|
|
int err;
|
|
int i;
|
|
|
|
domain_count = of_count_phandle_with_args(dev->of_node, "power-domains",
|
|
"#power-domain-cells");
|
|
if (domain_count < 0)
|
|
return domain_count;
|
|
|
|
if (domain_count <= 1)
|
|
return 0;
|
|
|
|
link_count = domain_count + (domain_count - 1);
|
|
|
|
domain_devs = kcalloc(domain_count, sizeof(*domain_devs), GFP_KERNEL);
|
|
if (!domain_devs)
|
|
return -ENOMEM;
|
|
|
|
domain_links = kcalloc(link_count, sizeof(*domain_links), GFP_KERNEL);
|
|
if (!domain_links)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < domain_count; i++) {
|
|
struct device *domain_dev;
|
|
|
|
dev_name[0] = 'a' + i;
|
|
domain_dev = dev_pm_domain_attach_by_name(dev, dev_name);
|
|
if (IS_ERR_OR_NULL(domain_dev)) {
|
|
err = domain_dev ? PTR_ERR(domain_dev) : -ENODEV;
|
|
goto err_detach;
|
|
}
|
|
|
|
domain_devs[i] = domain_dev;
|
|
}
|
|
|
|
for (i = 0; i < domain_count; i++) {
|
|
struct device_link *link;
|
|
|
|
link = device_link_add(dev, domain_devs[i], DL_FLAG_STATELESS | DL_FLAG_PM_RUNTIME);
|
|
if (!link) {
|
|
err = -ENODEV;
|
|
goto err_unlink;
|
|
}
|
|
|
|
domain_links[i] = link;
|
|
}
|
|
|
|
for (i = domain_count; i < link_count; i++) {
|
|
struct device_link *link;
|
|
|
|
link = device_link_add(domain_devs[i - domain_count + 1],
|
|
domain_devs[i - domain_count],
|
|
DL_FLAG_STATELESS | DL_FLAG_PM_RUNTIME);
|
|
if (!link) {
|
|
err = -ENODEV;
|
|
goto err_unlink;
|
|
}
|
|
|
|
domain_links[i] = link;
|
|
}
|
|
|
|
pvr_dev->power = (struct pvr_device_power){
|
|
.domain_devs = no_free_ptr(domain_devs),
|
|
.domain_links = no_free_ptr(domain_links),
|
|
.domain_count = domain_count,
|
|
};
|
|
|
|
return 0;
|
|
|
|
err_unlink:
|
|
while (--i >= 0)
|
|
device_link_del(domain_links[i]);
|
|
|
|
i = domain_count;
|
|
|
|
err_detach:
|
|
while (--i >= 0)
|
|
dev_pm_domain_detach(domain_devs[i], true);
|
|
|
|
return err;
|
|
}
|
|
|
|
void pvr_power_domains_fini(struct pvr_device *pvr_dev)
|
|
{
|
|
const int domain_count = pvr_dev->power.domain_count;
|
|
|
|
int i = domain_count + (domain_count - 1);
|
|
|
|
while (--i >= 0)
|
|
device_link_del(pvr_dev->power.domain_links[i]);
|
|
|
|
i = domain_count;
|
|
|
|
while (--i >= 0)
|
|
dev_pm_domain_detach(pvr_dev->power.domain_devs[i], true);
|
|
|
|
kfree(pvr_dev->power.domain_links);
|
|
kfree(pvr_dev->power.domain_devs);
|
|
|
|
pvr_dev->power = (struct pvr_device_power){ 0 };
|
|
}
|