Josip Pavic 06b0a4ad71 drm/amd/display: log destination of vertical interrupt ... [Why] Knowing the destination of OTG's vertical interrupt 2 is useful for debugging, but it is not currently included in the OTG state readback logic [How] Read the OTG interrupt destination register to get the vertical interrupt 2 destination on ASICs that have this register when reading back the OTG state from hardware Reviewed-by: Sung Lee <sung.lee@amd.com> Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2025-02-12 21:02:57 -05:00
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dcn10_cm_common.c	drm/amd/display: Fix low black values by increasing error	2024-10-07 14:12:01 -04:00
dcn10_cm_common.h	drm/amd/display: Add dpp_get_gamut_remap functions	2024-01-22 17:13:26 -05:00
dcn10_dwb.c	drm/amd/display: Drop unnecessary DCN guards	2023-03-07 14:22:40 -05:00
dcn10_dwb.h	drm/amd/display: Drop unnecessary DCN guards	2023-03-07 14:22:40 -05:00
dcn10_hw_sequencer_debug.c	drm/amd/display: log destination of vertical interrupt	2025-02-12 21:02:57 -05:00
dcn10_hw_sequencer_debug.h
dcn10_ipp.c	drm/amd/display: Move all linux includes into OS types	2022-07-05 16:16:49 -04:00
dcn10_ipp.h
Makefile	drm/amd/display: Refactoring MPC	2024-07-23 17:07:11 -04:00