linux-loongson/drivers/gpu/drm/amd/display/dc/clk_mgr
Timur Kristóf 297a4833a6 drm/amd/display: Fix DP audio DTO1 clock source on DCE 6.
On DCE 6, DP audio was not working. However, it worked when an
HDMI monitor was also plugged in.

Looking at dce_aud_wall_dto_setup it seems that the main
difference is that we use DTO1 when only DP is plugged in.

When programming DTO1, it uses audio_dto_source_clock_in_khz
which is set from get_dp_ref_freq_khz

The dce60_get_dp_ref_freq_khz implementation looks incorrect,
because DENTIST_DISPCLK_CNTL seems to be always zero on DCE 6,
so it isn't usable.
I compared dce60_get_dp_ref_freq_khz to the legacy display code,
specifically dce_v6_0_audio_set_dto, and it turns out that in
case of DCE 6, it needs to use the display clock. With that,
DP audio started working on Pitcairn, Oland and Cape Verde.

However, it still didn't work on Tahiti. Despite having the
same DCE version, Tahiti seems to have a different audio device.
After some trial and error I realized that it works with the
default display clock as reported by the VBIOS, not the current
display clock.

The patch was tested on all four SI GPUs:

* Pitcairn (DCE 6.0)
* Oland (DCE 6.4)
* Cape Verde (DCE 6.0)
* Tahiti (DCE 6.0 but different)

The testing was done on Samsung Odyssey G7 LS28BG700EPXEN on
each of the above GPUs, at the following settings:

* 4K 60 Hz
* 1080p 60 Hz
* 1080p 144 Hz

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Rodrigo Siqueira <siqueira@igalia.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 645cc7863da5de700547d236697dffd6760cf051)
Cc: stable@vger.kernel.org
2025-08-18 18:00:56 -04:00
..
dce60 drm/amd/display: Fix DP audio DTO1 clock source on DCE 6. 2025-08-18 18:00:56 -04:00
dce100 drm/amd/display: Fill display clock and vblank time in dce110_fill_display_configs 2025-08-18 17:59:53 -04:00
dce110 drm/amd/display: Fill display clock and vblank time in dce110_fill_display_configs 2025-08-18 17:59:53 -04:00
dce112
dce120 drm/amd/display: Refactor HWSS into component folder 2023-10-09 17:00:09 -04:00
dcn10 drm/amd/display: Remove unused *vbios_smu_set_dprefclk 2025-04-22 08:51:45 -04:00
dcn20 drm/amd/display: handle invalid connector indices 2024-04-09 21:59:37 -04:00
dcn21 drm/amd/display: Remove unused *vbios_smu_set_dprefclk 2025-04-22 08:51:45 -04:00
dcn30 drm/amd/display: Initial support for SmartMux 2025-07-15 14:07:53 -04:00
dcn31 drm/amd/display: Refactoring if and endif statements to enable DC_LOGGER 2024-10-28 16:35:43 -04:00
dcn32 drm/amd/display: Fix possible overflow in integer multiplication 2024-07-01 16:06:53 -04:00
dcn35 drm/amd/display: rename IPS2 entry/exit message 2025-04-07 18:01:08 -04:00
dcn201 drm/amdgpu: rename register headers to dcn_2_0_1 2024-12-10 10:37:34 -05:00
dcn301 drm/amd/display: Remove redundant checks for ctx->dc_bios 2024-06-19 12:45:33 -04:00
dcn314 drm/amd/display: Refactoring if and endif statements to enable DC_LOGGER 2024-10-28 16:35:43 -04:00
dcn315 drm/amd/display: Use sync version of indirect register access. 2025-04-07 15:18:31 -04:00
dcn316 drm/amd/display: Guard against setting dispclk low for dcn31x 2025-03-18 14:03:46 -04:00
dcn401 drm/amd/display: Free memory allocation 2025-07-15 14:07:52 -04:00
clk_mgr.c drm/amd/display: Don't overwrite dce60_clk_mgr 2025-08-04 15:39:21 -04:00
Makefile drm/amd/display: Initial support for SmartMux 2025-07-15 14:07:53 -04:00