mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-08-26 21:52:20 +00:00
d9d87d90cc
The conversion of all GPIO drivers to using the .set_rv() and .set_multiple_rv() callbacks from struct gpio_chip (which - unlike their predecessors - return an integer and allow the controller drivers to indicate failures to users) is now complete and the legacy ones have been removed. Rename the new callbacks back to their original names in one sweeping change. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
395 lines
9.7 KiB
C
395 lines
9.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Loongson GPIO Support
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*
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* Copyright (C) 2022-2023 Loongson Technology Corporation Limited
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include <linux/err.h>
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#include <linux/gpio/driver.h>
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#include <linux/platform_device.h>
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#include <linux/bitops.h>
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#include <asm/types.h>
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enum loongson_gpio_mode {
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BIT_CTRL_MODE,
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BYTE_CTRL_MODE,
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};
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struct loongson_gpio_chip_data {
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const char *label;
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enum loongson_gpio_mode mode;
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unsigned int conf_offset;
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unsigned int out_offset;
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unsigned int in_offset;
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unsigned int inten_offset;
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};
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struct loongson_gpio_chip {
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struct gpio_chip chip;
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spinlock_t lock;
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void __iomem *reg_base;
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const struct loongson_gpio_chip_data *chip_data;
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};
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static inline struct loongson_gpio_chip *to_loongson_gpio_chip(struct gpio_chip *chip)
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{
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return container_of(chip, struct loongson_gpio_chip, chip);
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}
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static inline void loongson_commit_direction(struct loongson_gpio_chip *lgpio, unsigned int pin,
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int input)
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{
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u8 bval = input ? 1 : 0;
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writeb(bval, lgpio->reg_base + lgpio->chip_data->conf_offset + pin);
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}
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static void loongson_commit_level(struct loongson_gpio_chip *lgpio, unsigned int pin, int high)
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{
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u8 bval = high ? 1 : 0;
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writeb(bval, lgpio->reg_base + lgpio->chip_data->out_offset + pin);
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}
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static int loongson_gpio_direction_input(struct gpio_chip *chip, unsigned int pin)
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{
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unsigned long flags;
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struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
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spin_lock_irqsave(&lgpio->lock, flags);
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loongson_commit_direction(lgpio, pin, 1);
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spin_unlock_irqrestore(&lgpio->lock, flags);
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return 0;
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}
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static int loongson_gpio_direction_output(struct gpio_chip *chip, unsigned int pin, int value)
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{
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unsigned long flags;
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struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
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spin_lock_irqsave(&lgpio->lock, flags);
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loongson_commit_level(lgpio, pin, value);
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loongson_commit_direction(lgpio, pin, 0);
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spin_unlock_irqrestore(&lgpio->lock, flags);
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return 0;
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}
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static int loongson_gpio_get(struct gpio_chip *chip, unsigned int pin)
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{
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u8 bval;
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int val;
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struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
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bval = readb(lgpio->reg_base + lgpio->chip_data->in_offset + pin);
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val = bval & 1;
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return val;
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}
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static int loongson_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
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{
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u8 bval;
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struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
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bval = readb(lgpio->reg_base + lgpio->chip_data->conf_offset + pin);
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if (bval & 1)
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return GPIO_LINE_DIRECTION_IN;
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return GPIO_LINE_DIRECTION_OUT;
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}
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static int loongson_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)
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{
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unsigned long flags;
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struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
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spin_lock_irqsave(&lgpio->lock, flags);
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loongson_commit_level(lgpio, pin, value);
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spin_unlock_irqrestore(&lgpio->lock, flags);
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return 0;
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}
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static int loongson_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
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{
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unsigned int u;
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struct platform_device *pdev = to_platform_device(chip->parent);
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struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
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if (lgpio->chip_data->mode == BIT_CTRL_MODE) {
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/* Get the register index from offset then multiply by bytes per register */
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u = readl(lgpio->reg_base + lgpio->chip_data->inten_offset + (offset / 32) * 4);
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u |= BIT(offset % 32);
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writel(u, lgpio->reg_base + lgpio->chip_data->inten_offset + (offset / 32) * 4);
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} else {
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writeb(1, lgpio->reg_base + lgpio->chip_data->inten_offset + offset);
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}
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return platform_get_irq(pdev, offset);
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}
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static int loongson_gpio_init(struct device *dev, struct loongson_gpio_chip *lgpio,
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void __iomem *reg_base)
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{
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int ret;
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lgpio->reg_base = reg_base;
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if (lgpio->chip_data->mode == BIT_CTRL_MODE) {
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ret = bgpio_init(&lgpio->chip, dev, 8,
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lgpio->reg_base + lgpio->chip_data->in_offset,
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lgpio->reg_base + lgpio->chip_data->out_offset,
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NULL, NULL,
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lgpio->reg_base + lgpio->chip_data->conf_offset,
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0);
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if (ret) {
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dev_err(dev, "unable to init generic GPIO\n");
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return ret;
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}
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} else {
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lgpio->chip.direction_input = loongson_gpio_direction_input;
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lgpio->chip.get = loongson_gpio_get;
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lgpio->chip.get_direction = loongson_gpio_get_direction;
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lgpio->chip.direction_output = loongson_gpio_direction_output;
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lgpio->chip.set = loongson_gpio_set;
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lgpio->chip.parent = dev;
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spin_lock_init(&lgpio->lock);
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}
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lgpio->chip.label = lgpio->chip_data->label;
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lgpio->chip.can_sleep = false;
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if (lgpio->chip_data->inten_offset)
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lgpio->chip.to_irq = loongson_gpio_to_irq;
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return devm_gpiochip_add_data(dev, &lgpio->chip, lgpio);
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}
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static int loongson_gpio_probe(struct platform_device *pdev)
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{
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void __iomem *reg_base;
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struct loongson_gpio_chip *lgpio;
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struct device *dev = &pdev->dev;
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lgpio = devm_kzalloc(dev, sizeof(*lgpio), GFP_KERNEL);
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if (!lgpio)
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return -ENOMEM;
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lgpio->chip_data = device_get_match_data(dev);
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reg_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(reg_base))
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return PTR_ERR(reg_base);
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return loongson_gpio_init(dev, lgpio, reg_base);
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}
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static const struct loongson_gpio_chip_data loongson_gpio_ls2k_data = {
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.label = "ls2k_gpio",
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.mode = BIT_CTRL_MODE,
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.conf_offset = 0x0,
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.in_offset = 0x20,
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.out_offset = 0x10,
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.inten_offset = 0x30,
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};
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static const struct loongson_gpio_chip_data loongson_gpio_ls2k0500_data0 = {
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.label = "ls2k0500_gpio",
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.mode = BIT_CTRL_MODE,
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.conf_offset = 0x0,
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.in_offset = 0x8,
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.out_offset = 0x10,
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.inten_offset = 0xb0,
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};
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static const struct loongson_gpio_chip_data loongson_gpio_ls2k0500_data1 = {
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.label = "ls2k0500_gpio",
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.mode = BIT_CTRL_MODE,
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.conf_offset = 0x0,
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.in_offset = 0x8,
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.out_offset = 0x10,
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.inten_offset = 0x98,
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};
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static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data0 = {
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.label = "ls2k2000_gpio",
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.mode = BIT_CTRL_MODE,
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.conf_offset = 0x0,
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.in_offset = 0xc,
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.out_offset = 0x8,
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.inten_offset = 0x14,
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};
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static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data1 = {
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.label = "ls2k2000_gpio",
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.mode = BIT_CTRL_MODE,
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.conf_offset = 0x0,
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.in_offset = 0x20,
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.out_offset = 0x10,
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.inten_offset = 0x30,
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};
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static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data2 = {
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.label = "ls2k2000_gpio",
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.mode = BIT_CTRL_MODE,
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.conf_offset = 0x4,
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.in_offset = 0x8,
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.out_offset = 0x0,
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};
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static const struct loongson_gpio_chip_data loongson_gpio_ls3a5000_data = {
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.label = "ls3a5000_gpio",
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.mode = BIT_CTRL_MODE,
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.conf_offset = 0x0,
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.in_offset = 0xc,
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.out_offset = 0x8,
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.inten_offset = 0x14,
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};
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static const struct loongson_gpio_chip_data loongson_gpio_ls7a_data = {
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.label = "ls7a_gpio",
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.mode = BYTE_CTRL_MODE,
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.conf_offset = 0x800,
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.in_offset = 0xa00,
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.out_offset = 0x900,
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.inten_offset = 0xb00,
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};
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/* LS7A2000 chipset GPIO */
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static const struct loongson_gpio_chip_data loongson_gpio_ls7a2000_data0 = {
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.label = "ls7a2000_gpio",
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.mode = BYTE_CTRL_MODE,
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.conf_offset = 0x800,
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.in_offset = 0xa00,
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.out_offset = 0x900,
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.inten_offset = 0xb00,
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};
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/* LS7A2000 ACPI GPIO */
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static const struct loongson_gpio_chip_data loongson_gpio_ls7a2000_data1 = {
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.label = "ls7a2000_gpio",
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.mode = BIT_CTRL_MODE,
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.conf_offset = 0x4,
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.in_offset = 0x8,
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.out_offset = 0x0,
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};
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/* Loongson-3A6000 node GPIO */
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static const struct loongson_gpio_chip_data loongson_gpio_ls3a6000_data = {
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.label = "ls3a6000_gpio",
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.mode = BIT_CTRL_MODE,
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.conf_offset = 0x0,
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.in_offset = 0xc,
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.out_offset = 0x8,
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.inten_offset = 0x14,
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};
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static const struct of_device_id loongson_gpio_of_match[] = {
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{
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.compatible = "loongson,ls2k-gpio",
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.data = &loongson_gpio_ls2k_data,
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},
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{
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.compatible = "loongson,ls2k0500-gpio0",
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.data = &loongson_gpio_ls2k0500_data0,
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},
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{
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.compatible = "loongson,ls2k0500-gpio1",
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.data = &loongson_gpio_ls2k0500_data1,
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},
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{
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.compatible = "loongson,ls2k2000-gpio0",
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.data = &loongson_gpio_ls2k2000_data0,
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},
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{
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.compatible = "loongson,ls2k2000-gpio1",
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.data = &loongson_gpio_ls2k2000_data1,
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},
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{
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.compatible = "loongson,ls2k2000-gpio2",
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.data = &loongson_gpio_ls2k2000_data2,
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},
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{
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.compatible = "loongson,ls3a5000-gpio",
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.data = &loongson_gpio_ls3a5000_data,
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},
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{
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.compatible = "loongson,ls7a-gpio",
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.data = &loongson_gpio_ls7a_data,
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},
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{
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.compatible = "loongson,ls7a2000-gpio1",
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.data = &loongson_gpio_ls7a2000_data0,
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},
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{
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.compatible = "loongson,ls7a2000-gpio2",
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.data = &loongson_gpio_ls7a2000_data1,
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},
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{
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.compatible = "loongson,ls3a6000-gpio",
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.data = &loongson_gpio_ls3a6000_data,
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},
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{}
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};
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MODULE_DEVICE_TABLE(of, loongson_gpio_of_match);
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static const struct acpi_device_id loongson_gpio_acpi_match[] = {
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{
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.id = "LOON0002",
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.driver_data = (kernel_ulong_t)&loongson_gpio_ls7a_data,
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},
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{
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.id = "LOON0007",
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.driver_data = (kernel_ulong_t)&loongson_gpio_ls3a5000_data,
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},
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{
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.id = "LOON000A",
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.driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data0,
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},
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{
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.id = "LOON000B",
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.driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data1,
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},
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{
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.id = "LOON000C",
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.driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data2,
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},
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{
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.id = "LOON000D",
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.driver_data = (kernel_ulong_t)&loongson_gpio_ls7a2000_data0,
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},
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{
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.id = "LOON000E",
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.driver_data = (kernel_ulong_t)&loongson_gpio_ls7a2000_data1,
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},
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{
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.id = "LOON000F",
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.driver_data = (kernel_ulong_t)&loongson_gpio_ls3a6000_data,
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},
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{}
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};
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MODULE_DEVICE_TABLE(acpi, loongson_gpio_acpi_match);
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static struct platform_driver loongson_gpio_driver = {
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.driver = {
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.name = "loongson-gpio",
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.of_match_table = loongson_gpio_of_match,
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.acpi_match_table = loongson_gpio_acpi_match,
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},
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.probe = loongson_gpio_probe,
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};
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static int __init loongson_gpio_setup(void)
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{
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return platform_driver_register(&loongson_gpio_driver);
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}
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postcore_initcall(loongson_gpio_setup);
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MODULE_DESCRIPTION("Loongson gpio driver");
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MODULE_LICENSE("GPL");
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