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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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a99a9f0ebd
Add support for reading of DPLL types and optional pin properties from
the system firmware (DT, ACPI...).
The DPLL types are stored in property 'dpll-types' as string array and
possible values 'pps' and 'eec' are mapped to DPLL enums DPLL_TYPE_PPS
and DPLL_TYPE_EEC.
The pin properties are stored under 'input-pins' and 'output-pins'
sub-nodes and the following ones are supported:
* reg
integer that specifies pin index
* label
string that is used by driver as board label
* connection-type
string that indicates pin connection type
* supported-frequencies-hz
array of u64 values what frequencies are supported / allowed for
given pin with respect to hardware wiring
Do not blindly trust system firmware and filter out frequencies that
cannot be configured/represented in device (input frequencies have to
be factorized by one of the base frequencies and output frequencies have
to divide configured synthesizer frequency).
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Link: https://patch.msgid.link/20250704182202.1641943-8-ivecera@redhat.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
35 lines
817 B
C
35 lines
817 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _ZL3073X_PROP_H
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#define _ZL3073X_PROP_H
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#include <linux/dpll.h>
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#include "core.h"
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struct fwnode_handle;
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/**
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* struct zl3073x_pin_props - pin properties
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* @fwnode: pin firmware node
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* @dpll_props: DPLL core pin properties
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* @package_label: pin package label
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* @esync_control: embedded sync support
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*/
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struct zl3073x_pin_props {
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struct fwnode_handle *fwnode;
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struct dpll_pin_properties dpll_props;
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char package_label[8];
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bool esync_control;
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};
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enum dpll_type zl3073x_prop_dpll_type_get(struct zl3073x_dev *zldev, u8 index);
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struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
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enum dpll_pin_direction dir,
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u8 index);
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void zl3073x_pin_props_put(struct zl3073x_pin_props *props);
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#endif /* _ZL3073X_PROP_H */
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