mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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771ba5c982
The error detection of the data aggregation feature is separated from the compression/decompression feature. This patch enables the error detection and reporting of the data aggregation feature. When an unrecoverable error occurs in the algorithm core, the device reports the error to the driver, and the driver will reset the device. Signed-off-by: Weili Qian <qianweili@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
115 lines
2.2 KiB
C
115 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2019 HiSilicon Limited. */
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#ifndef HISI_ZIP_H
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#define HISI_ZIP_H
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#undef pr_fmt
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#define pr_fmt(fmt) "hisi_zip: " fmt
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#include <linux/list.h>
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#include <linux/hisi_acc_qm.h>
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enum hisi_zip_error_type {
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/* negative compression */
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HZIP_NC_ERR = 0x0d,
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};
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struct hisi_zip_dfx {
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atomic64_t send_cnt;
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atomic64_t recv_cnt;
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atomic64_t send_busy_cnt;
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atomic64_t err_bd_cnt;
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};
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struct hisi_zip_ctrl;
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struct hisi_zip {
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struct hisi_qm qm;
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struct hisi_zip_ctrl *ctrl;
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struct hisi_zip_dfx dfx;
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};
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struct hisi_zip_sqe {
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u32 consumed;
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u32 produced;
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u32 comp_data_length;
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/*
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* status: 0~7 bits
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* rsvd: 8~31 bits
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*/
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u32 dw3;
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u32 input_data_length;
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u32 dw5;
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u32 dw6;
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/*
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* in_sge_data_offset: 0~23 bits
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* rsvd: 24~27 bits
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* sqe_type: 29~31 bits
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*/
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u32 dw7;
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/*
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* out_sge_data_offset: 0~23 bits
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* rsvd: 24~31 bits
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*/
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u32 dw8;
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/*
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* request_type: 0~7 bits
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* buffer_type: 8~11 bits
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* rsvd: 13~31 bits
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*/
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u32 dw9;
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u32 dw10;
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u32 dw11;
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u32 dw12;
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/* tag: in sqe type 0 */
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u32 dw13;
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u32 dest_avail_out;
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u32 dw15;
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u32 dw16;
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u32 dw17;
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u32 source_addr_l;
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u32 source_addr_h;
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u32 dest_addr_l;
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u32 dest_addr_h;
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u32 dw22;
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u32 dw23;
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u32 dw24;
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u32 dw25;
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/* tag: in sqe type 3 */
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u32 dw26;
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u32 dw27;
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u32 rsvd1[4];
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};
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enum zip_cap_table_type {
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QM_RAS_NFE_TYPE,
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QM_RAS_NFE_RESET,
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QM_RAS_CE_TYPE,
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ZIP_RAS_NFE_TYPE,
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ZIP_RAS_NFE_RESET,
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ZIP_RAS_CE_TYPE,
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ZIP_CORE_INFO,
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ZIP_CORE_EN,
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ZIP_DRV_ALG_BITMAP_TB,
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ZIP_ALG_BITMAP,
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ZIP_CORE1_BITMAP,
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ZIP_CORE2_BITMAP,
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ZIP_CORE3_BITMAP,
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ZIP_CORE4_BITMAP,
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ZIP_CORE5_BITMAP,
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};
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int zip_create_qps(struct hisi_qp **qps, int qp_num, int node);
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int hisi_zip_register_to_crypto(struct hisi_qm *qm);
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void hisi_zip_unregister_from_crypto(struct hisi_qm *qm);
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bool hisi_zip_alg_support(struct hisi_qm *qm, u32 alg);
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int hisi_dae_set_user_domain(struct hisi_qm *qm);
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int hisi_dae_set_alg(struct hisi_qm *qm);
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void hisi_dae_hw_error_disable(struct hisi_qm *qm);
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void hisi_dae_hw_error_enable(struct hisi_qm *qm);
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void hisi_dae_open_axi_master_ooo(struct hisi_qm *qm);
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int hisi_dae_close_axi_master_ooo(struct hisi_qm *qm);
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bool hisi_dae_dev_is_abnormal(struct hisi_qm *qm);
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enum acc_err_result hisi_dae_get_err_result(struct hisi_qm *qm);
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#endif
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