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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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e0740bee6c
The Allwinner H616 (and later) SoCs support more than 32 bits worth of physical addresses. To accommodate the larger address space, the CE task descriptor fields holding addresses are now encoded as "word addresses", so take the actual address divided by four. This is true for the fields within the descriptor, but also for the descriptor base address, in the CE_TDA register. Wrap all accesses to those fields in a function, which will do the required division if needed. For now this in unused, so there should be no change in behaviour. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
124 lines
2.8 KiB
C
124 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* sun8i-ce-trng.c - hardware cryptographic offloader for
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* Allwinner H3/A64/H5/H2+/H6/R40 SoC
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*
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* Copyright (C) 2015-2020 Corentin Labbe <clabbe@baylibre.com>
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*
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* This file handle the TRNG
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*
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* You could find a link for the datasheet in Documentation/arch/arm/sunxi.rst
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*/
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#include "sun8i-ce.h"
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#include <linux/dma-mapping.h>
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#include <linux/pm_runtime.h>
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#include <linux/hw_random.h>
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/*
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* Note that according to the algorithm ID, 2 versions of the TRNG exists,
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* The first present in H3/H5/R40/A64 and the second present in H6.
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* This file adds support for both, but only the second is working
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* reliabily according to rngtest.
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**/
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static int sun8i_ce_trng_read(struct hwrng *rng, void *data, size_t max, bool wait)
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{
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struct sun8i_ce_dev *ce;
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dma_addr_t dma_dst;
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int err = 0;
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int flow = 3;
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unsigned int todo;
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struct sun8i_ce_flow *chan;
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struct ce_task *cet;
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u32 common;
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void *d;
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ce = container_of(rng, struct sun8i_ce_dev, trng);
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/* round the data length to a multiple of 32*/
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todo = max + 32;
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todo -= todo % 32;
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d = kzalloc(todo, GFP_KERNEL | GFP_DMA);
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if (!d)
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return -ENOMEM;
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#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
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ce->hwrng_stat_req++;
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ce->hwrng_stat_bytes += todo;
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#endif
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dma_dst = dma_map_single(ce->dev, d, todo, DMA_FROM_DEVICE);
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if (dma_mapping_error(ce->dev, dma_dst)) {
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dev_err(ce->dev, "Cannot DMA MAP DST\n");
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err = -EFAULT;
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goto err_dst;
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}
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err = pm_runtime_resume_and_get(ce->dev);
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if (err < 0)
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goto err_pm;
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mutex_lock(&ce->rnglock);
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chan = &ce->chanlist[flow];
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cet = &chan->tl[0];
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memset(cet, 0, sizeof(struct ce_task));
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cet->t_id = cpu_to_le32(flow);
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common = ce->variant->trng | CE_COMM_INT;
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cet->t_common_ctl = cpu_to_le32(common);
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/* recent CE (H6) need length in bytes, in word otherwise */
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if (ce->variant->trng_t_dlen_in_bytes)
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cet->t_dlen = cpu_to_le32(todo);
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else
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cet->t_dlen = cpu_to_le32(todo / 4);
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cet->t_sym_ctl = 0;
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cet->t_asym_ctl = 0;
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cet->t_dst[0].addr = desc_addr_val_le32(ce, dma_dst);
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cet->t_dst[0].len = cpu_to_le32(todo / 4);
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ce->chanlist[flow].timeout = todo;
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err = sun8i_ce_run_task(ce, 3, "TRNG");
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mutex_unlock(&ce->rnglock);
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pm_runtime_put(ce->dev);
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err_pm:
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dma_unmap_single(ce->dev, dma_dst, todo, DMA_FROM_DEVICE);
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if (!err) {
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memcpy(data, d, max);
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err = max;
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}
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err_dst:
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kfree_sensitive(d);
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return err;
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}
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int sun8i_ce_hwrng_register(struct sun8i_ce_dev *ce)
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{
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int ret;
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if (ce->variant->trng == CE_ID_NOTSUPP) {
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dev_info(ce->dev, "TRNG not supported\n");
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return 0;
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}
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ce->trng.name = "sun8i Crypto Engine TRNG";
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ce->trng.read = sun8i_ce_trng_read;
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ret = hwrng_register(&ce->trng);
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if (ret)
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dev_err(ce->dev, "Fail to register the TRNG\n");
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return ret;
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}
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void sun8i_ce_hwrng_unregister(struct sun8i_ce_dev *ce)
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{
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if (ce->variant->trng == CE_ID_NOTSUPP)
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return;
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hwrng_unregister(&ce->trng);
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}
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