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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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44a4ef59d5
While the GCC and Clang compilers already define __ASSEMBLER__ automatically when compiling assembly code, __ASSEMBLY__ is a macro that only gets defined by the Makefiles in the kernel. This can be very confusing when switching between userspace and kernelspace coding, or when dealing with uapi headers that rather should use __ASSEMBLER__ instead. So let's standardize on the __ASSEMBLER__ macro that is provided by the compilers now. This is a completely mechanical patch (done with a simple "sed -i" statement). Cc: Chris Zankel <chris@zankel.net> Cc: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250314071013.1575167-40-thuth@redhat.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
268 lines
7.8 KiB
C
268 lines
7.8 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2008 Tensilica Inc.
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* Copyright (C) 2015 Cadence Design Systems Inc.
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*/
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#ifndef _XTENSA_PROCESSOR_H
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#define _XTENSA_PROCESSOR_H
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#include <asm/core.h>
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#include <linux/compiler.h>
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#include <linux/stringify.h>
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#include <asm/bootparam.h>
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#include <asm/ptrace.h>
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#include <asm/types.h>
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#include <asm/regs.h>
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#define ARCH_SLAB_MINALIGN XTENSA_STACK_ALIGNMENT
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/*
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* User space process size: 1 GB.
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* Windowed call ABI requires caller and callee to be located within the same
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* 1 GB region. The C compiler places trampoline code on the stack for sources
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* that take the address of a nested C function (a feature used by glibc), so
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* the 1 GB requirement applies to the stack as well.
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*/
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#ifdef CONFIG_MMU
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#define TASK_SIZE __XTENSA_UL_CONST(0x40000000)
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#else
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#define TASK_SIZE __XTENSA_UL_CONST(0xffffffff)
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#endif
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#define STACK_TOP TASK_SIZE
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#define STACK_TOP_MAX STACK_TOP
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/*
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* General exception cause assigned to fake NMI. Fake NMI needs to be handled
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* differently from other interrupts, but it uses common kernel entry/exit
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* code.
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*/
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#define EXCCAUSE_MAPPED_NMI 62
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/*
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* General exception cause assigned to debug exceptions. Debug exceptions go
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* to their own vector, rather than the general exception vectors (user,
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* kernel, double); and their specific causes are reported via DEBUGCAUSE
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* rather than EXCCAUSE. However it is sometimes convenient to redirect debug
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* exceptions to the general exception mechanism. To do this, an otherwise
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* unused EXCCAUSE value was assigned to debug exceptions for this purpose.
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*/
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#define EXCCAUSE_MAPPED_DEBUG 63
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/*
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* We use DEPC also as a flag to distinguish between double and regular
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* exceptions. For performance reasons, DEPC might contain the value of
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* EXCCAUSE for regular exceptions, so we use this definition to mark a
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* valid double exception address.
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* (Note: We use it in bgeui, so it should be 64, 128, or 256)
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*/
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#define VALID_DOUBLE_EXCEPTION_ADDRESS 64
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#define XTENSA_INT_LEVEL(intno) _XTENSA_INT_LEVEL(intno)
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#define _XTENSA_INT_LEVEL(intno) XCHAL_INT##intno##_LEVEL
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#define XTENSA_INTLEVEL_MASK(level) _XTENSA_INTLEVEL_MASK(level)
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#define _XTENSA_INTLEVEL_MASK(level) (XCHAL_INTLEVEL##level##_MASK)
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#define XTENSA_INTLEVEL_ANDBELOW_MASK(l) _XTENSA_INTLEVEL_ANDBELOW_MASK(l)
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#define _XTENSA_INTLEVEL_ANDBELOW_MASK(l) (XCHAL_INTLEVEL##l##_ANDBELOW_MASK)
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#define PROFILING_INTLEVEL XTENSA_INT_LEVEL(XCHAL_PROFILING_INTERRUPT)
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/* LOCKLEVEL defines the interrupt level that masks all
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* general-purpose interrupts.
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*/
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#if defined(CONFIG_XTENSA_FAKE_NMI) && defined(XCHAL_PROFILING_INTERRUPT)
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#define LOCKLEVEL (PROFILING_INTLEVEL - 1)
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#else
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#define LOCKLEVEL XCHAL_EXCM_LEVEL
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#endif
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#define TOPLEVEL XCHAL_EXCM_LEVEL
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#define XTENSA_FAKE_NMI (LOCKLEVEL < TOPLEVEL)
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/* WSBITS and WBBITS are the width of the WINDOWSTART and WINDOWBASE
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* registers
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*/
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#define WSBITS (XCHAL_NUM_AREGS / 4) /* width of WINDOWSTART in bits */
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#define WBBITS (XCHAL_NUM_AREGS_LOG2 - 2) /* width of WINDOWBASE in bits */
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#if defined(__XTENSA_WINDOWED_ABI__)
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#define KERNEL_PS_WOE_MASK PS_WOE_MASK
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#elif defined(__XTENSA_CALL0_ABI__)
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#define KERNEL_PS_WOE_MASK 0
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#else
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#error Unsupported xtensa ABI
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#endif
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#ifndef __ASSEMBLER__
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#if defined(__XTENSA_WINDOWED_ABI__)
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/* Build a valid return address for the specified call winsize.
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* winsize must be 1 (call4), 2 (call8), or 3 (call12)
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*/
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#define MAKE_RA_FOR_CALL(ra,ws) (((ra) & 0x3fffffff) | (ws) << 30)
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/* Convert return address to a valid pc
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* Note: 'text' is the address within the same 1GB range as the ra
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*/
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#define MAKE_PC_FROM_RA(ra, text) (((ra) & 0x3fffffff) | ((unsigned long)(text) & 0xc0000000))
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#elif defined(__XTENSA_CALL0_ABI__)
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/* Build a valid return address for the specified call winsize.
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* winsize must be 1 (call4), 2 (call8), or 3 (call12)
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*/
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#define MAKE_RA_FOR_CALL(ra, ws) (ra)
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/* Convert return address to a valid pc
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* Note: 'text' is not used as 'ra' is always the full address
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*/
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#define MAKE_PC_FROM_RA(ra, text) (ra)
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#else
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#error Unsupported Xtensa ABI
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#endif
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/* Spill slot location for the register reg in the spill area under the stack
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* pointer sp. reg must be in the range [0..4).
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*/
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#define SPILL_SLOT(sp, reg) (*(((unsigned long *)(sp)) - 4 + (reg)))
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/* Spill slot location for the register reg in the spill area under the stack
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* pointer sp for the call8. reg must be in the range [4..8).
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*/
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#define SPILL_SLOT_CALL8(sp, reg) (*(((unsigned long *)(sp)) - 12 + (reg)))
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/* Spill slot location for the register reg in the spill area under the stack
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* pointer sp for the call12. reg must be in the range [4..12).
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*/
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#define SPILL_SLOT_CALL12(sp, reg) (*(((unsigned long *)(sp)) - 16 + (reg)))
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struct thread_struct {
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/* kernel's return address and stack pointer for context switching */
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unsigned long ra; /* kernel's a0: return address and window call size */
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unsigned long sp; /* kernel's a1: stack pointer */
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#ifdef CONFIG_HAVE_HW_BREAKPOINT
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struct perf_event *ptrace_bp[XCHAL_NUM_IBREAK];
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struct perf_event *ptrace_wp[XCHAL_NUM_DBREAK];
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#endif
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} __aligned(16);
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/* This decides where the kernel will search for a free chunk of vm
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* space during mmap's.
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*/
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#define TASK_UNMAPPED_BASE (TASK_SIZE / 2)
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#define INIT_THREAD \
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{ \
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ra: 0, \
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sp: sizeof(init_stack) + (long) &init_stack, \
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}
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/*
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* Do necessary setup to start up a newly executed thread.
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* Note: When windowed ABI is used for userspace we set-up ps
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* as if we did a call4 to the new pc.
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* set_thread_state in signal.c depends on it.
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*/
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#if IS_ENABLED(CONFIG_USER_ABI_CALL0)
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#define USER_PS_VALUE ((USER_RING << PS_RING_SHIFT) | \
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(1 << PS_UM_BIT) | \
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(1 << PS_EXCM_BIT))
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#else
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#define USER_PS_VALUE (PS_WOE_MASK | \
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(1 << PS_CALLINC_SHIFT) | \
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(USER_RING << PS_RING_SHIFT) | \
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(1 << PS_UM_BIT) | \
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(1 << PS_EXCM_BIT))
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#endif
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/* Clearing a0 terminates the backtrace. */
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#define start_thread(regs, new_pc, new_sp) \
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do { \
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unsigned long syscall = (regs)->syscall; \
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unsigned long current_aregs[16]; \
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memcpy(current_aregs, (regs)->areg, sizeof(current_aregs)); \
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memset((regs), 0, sizeof(*(regs))); \
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(regs)->pc = (new_pc); \
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(regs)->ps = USER_PS_VALUE; \
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memcpy((regs)->areg, current_aregs, sizeof(current_aregs)); \
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(regs)->areg[1] = (new_sp); \
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(regs)->areg[0] = 0; \
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(regs)->wmask = 1; \
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(regs)->depc = 0; \
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(regs)->windowbase = 0; \
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(regs)->windowstart = 1; \
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(regs)->syscall = syscall; \
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} while (0)
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/* Forward declaration */
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struct task_struct;
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struct mm_struct;
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extern unsigned long __get_wchan(struct task_struct *p);
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void init_arch(bp_tag_t *bp_start);
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void do_notify_resume(struct pt_regs *regs);
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#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
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#define KSTK_ESP(tsk) (task_pt_regs(tsk)->areg[1])
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#define cpu_relax() barrier()
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/* Special register access. */
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#define xtensa_set_sr(x, sr) \
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({ \
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__asm__ __volatile__ ("wsr %0, "__stringify(sr) :: \
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"a"((unsigned int)(x))); \
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})
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#define xtensa_get_sr(sr) \
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({ \
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unsigned int v; \
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__asm__ __volatile__ ("rsr %0, "__stringify(sr) : "=a"(v)); \
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v; \
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})
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#define xtensa_xsr(x, sr) \
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({ \
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unsigned int __v__ = (unsigned int)(x); \
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__asm__ __volatile__ ("xsr %0, " __stringify(sr) : "+a"(__v__)); \
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__v__; \
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})
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#if XCHAL_HAVE_EXTERN_REGS
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static inline void set_er(unsigned long value, unsigned long addr)
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{
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asm volatile ("wer %0, %1" : : "a" (value), "a" (addr) : "memory");
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}
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static inline unsigned long get_er(unsigned long addr)
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{
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register unsigned long value;
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asm volatile ("rer %0, %1" : "=a" (value) : "a" (addr) : "memory");
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return value;
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}
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#endif /* XCHAL_HAVE_EXTERN_REGS */
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#endif /* __ASSEMBLER__ */
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#endif /* _XTENSA_PROCESSOR_H */
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