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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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377be47f90
If thead,vlenb is provided in the device tree, prefer that over reading the vlenb csr. Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Yangyu Chen <cyy@cyyself.name> Link: https://lore.kernel.org/r/20241113-xtheadvector-v11-5-236c22791ef9@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
30 lines
901 B
C
30 lines
901 B
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <asm/cpufeature.h>
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#include <asm/vendor_extensions.h>
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#include <asm/vendor_extensions/thead.h>
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#include <linux/array_size.h>
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#include <linux/cpumask.h>
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#include <linux/types.h>
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/* All T-Head vendor extensions supported in Linux */
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static const struct riscv_isa_ext_data riscv_isa_vendor_ext_thead[] = {
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__RISCV_ISA_EXT_DATA(xtheadvector, RISCV_ISA_VENDOR_EXT_XTHEADVECTOR),
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};
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struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_thead = {
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.ext_data_count = ARRAY_SIZE(riscv_isa_vendor_ext_thead),
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.ext_data = riscv_isa_vendor_ext_thead,
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};
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void disable_xtheadvector(void)
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{
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int cpu;
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for_each_possible_cpu(cpu)
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clear_bit(RISCV_ISA_VENDOR_EXT_XTHEADVECTOR, riscv_isa_vendor_ext_list_thead.per_hart_isa_bitmap[cpu].isa);
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clear_bit(RISCV_ISA_VENDOR_EXT_XTHEADVECTOR, riscv_isa_vendor_ext_list_thead.all_harts_isa_bitmap.isa);
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}
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