mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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38818f7c9c
One of four USB-A ports on the Pine64 Star64 is USB 3.0 which requires to disable PCIE0 and change the mode of PCIE0 PHY to USB3.0 operation. The remaining three USB-A ports are USB 2.0 with the USB0 PHY and do not conflict with any of PCIE0 or PCIE1. PCIE1 (1-lane) routes to a PCIe X4 connector. Signed-off-by: E Shattow <e@freeshell.de> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
108 lines
1.9 KiB
Plaintext
108 lines
1.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0 OR MIT
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/*
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* Copyright (C) 2024 Henry Bell <dmoo_dv@protonmail.com>
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*/
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/dts-v1/;
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#include "jh7110-common.dtsi"
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/ {
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model = "Pine64 Star64";
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compatible = "pine64,star64", "starfive,jh7110";
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aliases {
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ethernet1 = &gmac1;
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};
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};
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&gmac0 {
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starfive,tx-use-rgmii-clk;
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assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
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assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
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status = "okay";
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};
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&gmac1 {
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phy-handle = <&phy1>;
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phy-mode = "rgmii-id";
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starfive,tx-use-rgmii-clk;
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assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
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assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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};
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&i2c0 {
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status = "okay";
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};
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&pcie1 {
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status = "okay";
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};
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&phy0 {
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rx-internal-delay-ps = <1500>;
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motorcomm,rx-clk-drv-microamp = <2910>;
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motorcomm,rx-data-drv-microamp = <2910>;
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motorcomm,tx-clk-adj-enabled;
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motorcomm,tx-clk-10-inverted;
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motorcomm,tx-clk-100-inverted;
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motorcomm,tx-clk-1000-inverted;
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};
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&phy1 {
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rx-internal-delay-ps = <0>;
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tx-internal-delay-ps = <300>;
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motorcomm,rx-clk-drv-microamp = <2910>;
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motorcomm,rx-data-drv-microamp = <2910>;
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motorcomm,tx-clk-adj-enabled;
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motorcomm,tx-clk-10-inverted;
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motorcomm,tx-clk-100-inverted;
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};
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&pwm {
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status = "okay";
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};
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&pwmdac {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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};
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&sysgpio {
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usb0_pins: usb0-0 {
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vbus-pins {
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pinmux = <GPIOMUX(25, GPOUT_SYS_USB_DRIVE_VBUS,
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GPOEN_ENABLE,
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GPI_NONE)>;
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bias-disable;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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};
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};
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&usb0 {
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dr_mode = "host";
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pinctrl-names = "default";
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pinctrl-0 = <&usb0_pins>;
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status = "okay";
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};
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&usb_cdns3 {
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phys = <&usbphy0>, <&pciephy0>;
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phy-names = "cdns3,usb2-phy", "cdns3,usb3-phy";
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};
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