linux-loongson/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts
Cristian Ciocaltea 2db68ddbf3 riscv: dts: starfive: beaglev-starlight: Setup phy reset gpio
The BeagleV Starlight SBC uses a Microchip KSZ9031RNXCA PHY supporting
RGMII-ID which doesn't require any particular setup, other than defining
a reset gpio, as opposed to VisionFive V1 for which the RX internal
delay had to be adjusted.

Co-developed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-01-31 12:23:26 +00:00

25 lines
448 B
Plaintext

// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (C) 2021 StarFive Technology Co., Ltd.
* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
*/
/dts-v1/;
#include "jh7100-common.dtsi"
/ {
model = "BeagleV Starlight Beta";
compatible = "beagle,beaglev-starlight-jh7100-r0", "starfive,jh7100";
};
&gmac {
phy-handle = <&phy>;
};
&mdio {
phy: ethernet-phy@7 {
reg = <7>;
reset-gpios = <&gpio 63 GPIO_ACTIVE_LOW>;
};
};