mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-06 13:09:58 +00:00
b3992b82ad
Add some of the SoC's CPU peripherals currently supported:
- GPIO controller with support for 24 GPIO lines, although not all
lines are brought out to pads on the SoC package. These lines can
generate interrupts from external sources.
- Watchdog which can be used to restart the SoC if no external restart
logic is present.
- SPI controller, primarily used to access NOR flash
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
130 lines
2.3 KiB
Plaintext
130 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "mips,mips4KEc";
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reg = <0>;
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clocks = <&baseclk>;
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};
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};
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baseclk: baseclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <500000000>;
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};
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cpuintc: cpuintc {
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compatible = "mti,cpu-interrupt-controller";
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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};
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lx_clk: clock-lexra {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <200000000>;
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};
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soc@18000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x18000000 0x10000>;
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spi0: spi@1200 {
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compatible = "realtek,rtl8380-spi";
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reg = <0x1200 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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uart0: serial@2000 {
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compatible = "ns16550a";
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reg = <0x2000 0x100>;
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clocks = <&lx_clk>;
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interrupt-parent = <&intc>;
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interrupts = <31>;
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reg-io-width = <1>;
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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status = "disabled";
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};
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uart1: serial@2100 {
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compatible = "ns16550a";
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reg = <0x2100 0x100>;
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clocks = <&lx_clk>;
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interrupt-parent = <&intc>;
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interrupts = <30>;
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reg-io-width = <1>;
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reg-shift = <2>;
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fifo-size = <1>;
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no-loopback-test;
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status = "disabled";
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};
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intc: interrupt-controller@3000 {
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compatible = "realtek,rtl8380-intc", "realtek,rtl-intc";
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reg = <0x3000 0x20>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>, <3>, <4>, <5>, <6>;
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};
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watchdog: watchdog@3150 {
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compatible = "realtek,rtl8380-wdt";
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reg = <0x3150 0xc>;
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realtek,reset-mode = "soc";
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clocks = <&lx_clk>;
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timeout-sec = <20>;
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interrupt-parent = <&intc>;
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interrupt-names = "phase1", "phase2";
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interrupts = <19>, <18>;
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};
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gpio0: gpio@3500 {
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compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
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reg = <0x3500 0x1c>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <24>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <23>;
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};
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};
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};
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