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12c03bd444
EyeQ6H (or “High”) is an other SoC from Mobileye still based on the MIPS I6500 architecture as the EyeQ5. The 2 clusters of this SoC contains 4 cores which are capable of running 4 threads. Besides this, it features multiple controllers such as the classic UART, high speed I2C, SPI, as well as CAN-FD, PCIe Gen4, Octal/Quad SPI Flash interface, Gigabit Ethernet, MIPI CSI-2, MIPI DSI, and eMMC 5.1. It also includes a Hardware Security Module, Functional Safety Hardware, and video encoders and more. This commit provides the initial device tree files with support for UART, GPIO and pinctrl, as well as fixed clocked. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
89 lines
2.1 KiB
Plaintext
89 lines
2.1 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Copyright 2024 Mobileye Vision Technologies Ltd.
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*/
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/*
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* MUX register structure
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* bits | field | comment
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* [0] | MUX_SEL | 0 - GPIO, 1 - alternative func
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* [4] | SW_LOOPBACK|
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* [5] | SW_OUT_HZ |
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* [7] | DBG_IN |
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* [11:8] | DS | drive strength
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* [13:12] | PUD | pull-up/pull-down. 0, 3 - no, 1 - PD, 2 - PU
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* [14] | OD | Open drain
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* [15] | ST_CFG | Hysteretic input enable (Schmitt trigger)
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*/
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&pinctrl_west {
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// TODO: use pinctrl-single,bias-pullup
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// TODO: use pinctrl-single,bias-pulldown
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// TODO: use pinctrl-single,drive-strength
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// TODO: use pinctrl-single,input-schmitt
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i2c0_pins: i2c0-pins {
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pinctrl-single,pins = <
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0x000 0x200 // I2C0_SCL pin
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0x004 0x200 // I2C0_SDA pin
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>;
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};
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i2c1_pins: i2c1-pins {
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pinctrl-single,pins = <
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0x008 0x200 // I2C1_SCL pin
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0x00c 0x200 // I2C1_SDA pin
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>;
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};
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eth0_pins: eth0-pins {
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pinctrl-single,pins = <
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0x080 1 // GPIO_C4__SMA0_MDC pin
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0x084 1 // GPIO_C5__SMA0_MDIO pin
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>;
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};
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uart0_pins: uart0-pins {
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pinctrl-single,pins = <0x0a8 1>; // UART0 pin group
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};
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uart1_pins: uart1-pins {
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pinctrl-single,pins = <0x0a0 1>; // UART1 pin group
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};
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spi0_pins: spi0-pins {
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pinctrl-single,pins = <0x0ac 1>; // SPI0 pin group
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};
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spi1_pins: spi1-pins {
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pinctrl-single,pins = <0x0a4 1>; // SPI1 pin group
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};
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};
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&pinctrl_east {
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i2c2_pins: i2c2-pins {
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pinctrl-single,pins = <
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0x000 0x200 // i2c2_SCL pin
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0x004 0x200 // i2c2_SDA pin
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>;
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};
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i2c3_pins: i2c3-pins {
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pinctrl-single,pins = <
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0x008 0x200 // i2c3_SCL pin
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0x00c 0x200 // i2c3_SDA pin
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>;
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};
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eth1_pins: eth1-pins {
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pinctrl-single,pins = <
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0x080 1 // GPIO_D4__SMA1_MDC pin
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0x084 1 // GPIO_D5__SMA1_MDIO pin
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>;
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};
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uart2_sel_pins: uart2-pins {
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pinctrl-single,pins = <0x0a4 1>; // UART2 pin group
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};
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uart3_pins: uart3-pins {
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pinctrl-single,pins = <0x09c 1>; // UART3 pin group
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};
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spi2_pins: spi2-pins {
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pinctrl-single,pins = <0x0a8 1>; // SPI2 pin group
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};
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spi3_pins: spi3-pins {
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pinctrl-single,pins = <0x0a0 1>; // SPI3 pin group
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};
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};
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