mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-06 13:09:58 +00:00
2c2ca3416b
Currently alternative_has_cap_unlikely() can be used in VDSO code, but
alternative_has_cap_likely() cannot as it references alt_cb_patch_nops,
which is not available when linking the VDSO. This is unfortunate as it
would be useful to have alternative_has_cap_likely() available in VDSO
code.
The use of alt_cb_patch_nops was added in commit:
d926079f17 ("arm64: alternatives: add shared NOP callback")
... as removing duplicate NOPs within the kernel Image saved areasonable
amount of space.
Given the VDSO code will have nowhere near as many alternative branches
as the main kernel image, this isn't much of a concern, and a few extra
nops isn't a massive problem.
Change alternative_has_cap_likely() to only use alt_cb_patch_nops for
the main kernel image, and allow duplicate NOPs in VDSO code.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
269 lines
6.4 KiB
C
269 lines
6.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_ALTERNATIVE_MACROS_H
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#define __ASM_ALTERNATIVE_MACROS_H
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#include <linux/const.h>
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#include <vdso/bits.h>
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#include <asm/cpucaps.h>
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#include <asm/insn-def.h>
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/*
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* Binutils 2.27.0 can't handle a 'UL' suffix on constants, so for the assembly
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* macros below we must use we must use `(1 << ARM64_CB_SHIFT)`.
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*/
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#define ARM64_CB_SHIFT 15
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#define ARM64_CB_BIT BIT(ARM64_CB_SHIFT)
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#if ARM64_NCAPS >= ARM64_CB_BIT
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#error "cpucaps have overflown ARM64_CB_BIT"
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#endif
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#ifndef __ASSEMBLY__
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#include <linux/stringify.h>
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#define ALTINSTR_ENTRY(cpucap) \
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" .word 661b - .\n" /* label */ \
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" .word 663f - .\n" /* new instruction */ \
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" .hword " __stringify(cpucap) "\n" /* cpucap */ \
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" .byte 662b-661b\n" /* source len */ \
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" .byte 664f-663f\n" /* replacement len */
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#define ALTINSTR_ENTRY_CB(cpucap, cb) \
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" .word 661b - .\n" /* label */ \
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" .word " __stringify(cb) "- .\n" /* callback */ \
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" .hword " __stringify(cpucap) "\n" /* cpucap */ \
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" .byte 662b-661b\n" /* source len */ \
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" .byte 664f-663f\n" /* replacement len */
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/*
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* alternative assembly primitive:
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*
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* If any of these .org directive fail, it means that insn1 and insn2
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* don't have the same length. This used to be written as
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*
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* .if ((664b-663b) != (662b-661b))
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* .error "Alternatives instruction length mismatch"
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* .endif
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*
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* but most assemblers die if insn1 or insn2 have a .inst. This should
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* be fixed in a binutils release posterior to 2.25.51.0.2 (anything
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* containing commit 4e4d08cf7399b606 or c1baaddf8861).
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*
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* Alternatives with callbacks do not generate replacement instructions.
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*/
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#define __ALTERNATIVE_CFG(oldinstr, newinstr, cpucap, cfg_enabled) \
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".if "__stringify(cfg_enabled)" == 1\n" \
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"661:\n\t" \
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oldinstr "\n" \
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"662:\n" \
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".pushsection .altinstructions,\"a\"\n" \
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ALTINSTR_ENTRY(cpucap) \
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".popsection\n" \
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".subsection 1\n" \
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"663:\n\t" \
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newinstr "\n" \
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"664:\n\t" \
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".org . - (664b-663b) + (662b-661b)\n\t" \
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".org . - (662b-661b) + (664b-663b)\n\t" \
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".previous\n" \
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".endif\n"
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#define __ALTERNATIVE_CFG_CB(oldinstr, cpucap, cfg_enabled, cb) \
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".if "__stringify(cfg_enabled)" == 1\n" \
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"661:\n\t" \
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oldinstr "\n" \
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"662:\n" \
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".pushsection .altinstructions,\"a\"\n" \
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ALTINSTR_ENTRY_CB(cpucap, cb) \
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".popsection\n" \
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"663:\n\t" \
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"664:\n\t" \
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".endif\n"
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#define _ALTERNATIVE_CFG(oldinstr, newinstr, cpucap, cfg, ...) \
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__ALTERNATIVE_CFG(oldinstr, newinstr, cpucap, IS_ENABLED(cfg))
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#define ALTERNATIVE_CB(oldinstr, cpucap, cb) \
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__ALTERNATIVE_CFG_CB(oldinstr, (1 << ARM64_CB_SHIFT) | (cpucap), 1, cb)
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#else
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#include <asm/assembler.h>
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.macro altinstruction_entry orig_offset alt_offset cpucap orig_len alt_len
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.word \orig_offset - .
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.word \alt_offset - .
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.hword (\cpucap)
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.byte \orig_len
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.byte \alt_len
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.endm
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.macro alternative_insn insn1, insn2, cap, enable = 1
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.if \enable
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661: \insn1
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662: .pushsection .altinstructions, "a"
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altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f
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.popsection
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.subsection 1
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663: \insn2
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664: .org . - (664b-663b) + (662b-661b)
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.org . - (662b-661b) + (664b-663b)
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.previous
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.endif
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.endm
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/*
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* Alternative sequences
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*
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* The code for the case where the capability is not present will be
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* assembled and linked as normal. There are no restrictions on this
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* code.
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*
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* The code for the case where the capability is present will be
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* assembled into a special section to be used for dynamic patching.
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* Code for that case must:
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*
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* 1. Be exactly the same length (in bytes) as the default code
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* sequence.
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*
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* 2. Not contain a branch target that is used outside of the
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* alternative sequence it is defined in (branches into an
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* alternative sequence are not fixed up).
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*/
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/*
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* Begin an alternative code sequence.
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*/
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.macro alternative_if_not cap
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.set .Lasm_alt_mode, 0
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.pushsection .altinstructions, "a"
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altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f
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.popsection
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661:
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.endm
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.macro alternative_if cap
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.set .Lasm_alt_mode, 1
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.pushsection .altinstructions, "a"
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altinstruction_entry 663f, 661f, \cap, 664f-663f, 662f-661f
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.popsection
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.subsection 1
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.align 2 /* So GAS knows label 661 is suitably aligned */
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661:
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.endm
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.macro alternative_cb cap, cb
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.set .Lasm_alt_mode, 0
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.pushsection .altinstructions, "a"
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altinstruction_entry 661f, \cb, (1 << ARM64_CB_SHIFT) | \cap, 662f-661f, 0
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.popsection
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661:
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.endm
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/*
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* Provide the other half of the alternative code sequence.
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*/
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.macro alternative_else
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662:
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.if .Lasm_alt_mode==0
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.subsection 1
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.else
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.previous
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.endif
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663:
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.endm
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/*
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* Complete an alternative code sequence.
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*/
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.macro alternative_endif
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664:
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.org . - (664b-663b) + (662b-661b)
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.org . - (662b-661b) + (664b-663b)
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.if .Lasm_alt_mode==0
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.previous
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.endif
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.endm
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/*
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* Callback-based alternative epilogue
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*/
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.macro alternative_cb_end
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662:
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.endm
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/*
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* Provides a trivial alternative or default sequence consisting solely
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* of NOPs. The number of NOPs is chosen automatically to match the
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* previous case.
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*/
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.macro alternative_else_nop_endif
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alternative_else
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nops (662b-661b) / AARCH64_INSN_SIZE
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alternative_endif
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.endm
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#define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \
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alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)
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#endif /* __ASSEMBLY__ */
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/*
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* Usage: asm(ALTERNATIVE(oldinstr, newinstr, cpucap));
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*
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* Usage: asm(ALTERNATIVE(oldinstr, newinstr, cpucap, CONFIG_FOO));
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* N.B. If CONFIG_FOO is specified, but not selected, the whole block
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* will be omitted, including oldinstr.
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*/
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#define ALTERNATIVE(oldinstr, newinstr, ...) \
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_ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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static __always_inline bool
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alternative_has_cap_likely(const unsigned long cpucap)
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{
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if (!cpucap_is_possible(cpucap))
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return false;
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asm goto(
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#ifdef BUILD_VDSO
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ALTERNATIVE("b %l[l_no]", "nop", %[cpucap])
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#else
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ALTERNATIVE_CB("b %l[l_no]", %[cpucap], alt_cb_patch_nops)
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#endif
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:
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: [cpucap] "i" (cpucap)
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:
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: l_no);
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return true;
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l_no:
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return false;
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}
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static __always_inline bool
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alternative_has_cap_unlikely(const unsigned long cpucap)
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{
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if (!cpucap_is_possible(cpucap))
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return false;
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asm goto(
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ALTERNATIVE("nop", "b %l[l_yes]", %[cpucap])
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:
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: [cpucap] "i" (cpucap)
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:
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: l_yes);
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return false;
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l_yes:
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return true;
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}
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_ALTERNATIVE_MACROS_H */
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