mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-08-28 09:22:08 +00:00
2f24482304
There is new support for additional on-chip devices on Apple, Mediatek,
Renesas, Rockchip, Samsung, Google, TI, ST, Nvidia and Amlogic devices.
The Arm Morello reference platform gets a devicetree for booting in
normal aarch64 mode. The hardware supports experimental CHERI support,
which requires a modified kernel.
The AMD (formerly Xilinx) Versal NET SoC gets added, this is a combined
FPGA with Cortex-A78 CPUs in a SoC.
Six new ST STM32MP2 SoC variants are added. Like the earlier STM32MP25,
the MP211, MP213, MP215, MP231, MP233 and MP235 models are based on one
or two Cortex-A35 cores but each feature a different set of I/O devices.
Mediatek MT8370 is a minor variation of MT8390 with fewer CPU and
GPU cores
Apple T2 is the baseboard management controller on earlier Intel CPU
based Macs, with 16 models now gaining initial support.
All the above come with dts files for the reference boards. In
addition, these boards are added for the SoCs that are already supported.
- The Milk-V Jupiter board based on SpacemiT K1/M1
- NetCube Systems Kumquat board based on the 32-bit Allwinner V3s SoC
- Three boards based on 32-bit stm32mp1
- 11 distinct board variants from Toradex and one from Variscite,
all based on i.MX6
- Google Pixel Pro 6 phone based on gs101 (Tensor)
- Three additional variants of the i.MX8MP based "Skov" board
- A second variant of the i.MX95 EVK board
- Two boards based on Renesas SoCs
- Four boards based the Rockchip RK35xx series, plus the RK3588
"MNT Reform 2" laptop
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Merge tag 'soc-dt-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann:
"There is new support for additional on-chip devices on Apple,
Mediatek, Renesas, Rockchip, Samsung, Google, TI, ST, Nvidia and
Amlogic devices.
The Arm Morello reference platform gets a devicetree for booting in
normal aarch64 mode. The hardware supports experimental CHERI support,
which requires a modified kernel.
The AMD (formerly Xilinx) Versal NET SoC gets added, this is a
combined FPGA with Cortex-A78 CPUs in a SoC.
Six new ST STM32MP2 SoC variants are added. Like the earlier
STM32MP25, the MP211, MP213, MP215, MP231, MP233 and MP235 models are
based on one or two Cortex-A35 cores but each feature a different set
of I/O devices.
Mediatek MT8370 is a minor variation of MT8390 with fewer CPU and GPU
cores
Apple T2 is the baseboard management controller on earlier Intel CPU
based Macs, with 16 models now gaining initial support.
All the above come with dts files for the reference boards. In
addition, these boards are added for the SoCs that are already
supported:
- The Milk-V Jupiter board based on SpacemiT K1/M1
- NetCube Systems Kumquat board based on the 32-bit Allwinner V3s SoC
- Three boards based on 32-bit stm32mp1
- 11 distinct board variants from Toradex and one from Variscite, all
based on i.MX6
- Google Pixel Pro 6 phone based on gs101 (Tensor)
- Three additional variants of the i.MX8MP based "Skov" board
- A second variant of the i.MX95 EVK board
- Two boards based on Renesas SoCs
- Four boards based the Rockchip RK35xx series, plus the RK3588 'MNT
Reform 2' laptop"
* tag 'soc-dt-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (538 commits)
arm64: dts: Add gpio_intc node for Amlogic A5 SoCs
arm64: dts: Add gpio_intc node for Amlogic A4 SoCs
arm64: dts: hi3660: Add property for fixing CPUIdle
arm64: dts: rockchip: remove ethm0_clk0_25m_out from Sige5 gmac0
arm64: dts: marvell: Use preferred node names for "simple-bus"
arm64: dts: marvell: Drop unused CP11X_TYPE define
arm64: dts: marvell: Move arch timer and pmu nodes to top-level
arm64: dts: rockchip: Fix PWM pinctrl names
arm64: dts: rockchip: fix RK3576 SCMI clock IDs
dt-bindings: clock: rk3576: add SCMI clocks
arm64: dts: rockchip: Fix pcie reset gpio on Orange Pi 5 Max
arm64: dts: amd/seattle: Drop undocumented "spi-controller" properties
arm64: dts: amd/seattle: Fix bus, mmc, and ethernet node names
arm64: dts: amd/seattle: Move and simplify fixed clocks
arm64: dts: amd/seattle: Base Overdrive B1 on top of B0 version
arm64: dts: rockchip: Enable HDMI audio output for ArmSoM Sige7
arm64: dts: rockchip: Enable onboard eMMC on Radxa E20C
arm64: dts: rockchip: Add SDHCI controller for RK3528
arm64: dts: rockchip: Remove bluetooth node from rock-3a
arm64: dts: rockchip: Move rk356x scmi SHMEM to reserved memory
...
1264 lines
26 KiB
Plaintext
1264 lines
26 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Radxa Limited
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* Copyright (c) 2024 Heiko Stuebner <heiko@sntech.de>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/soc/rockchip,vop2.h>
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#include "dt-bindings/usb/pd.h"
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#include "rk3588.dtsi"
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/ {
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model = "Radxa ROCK 5 ITX";
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compatible = "radxa,rock-5-itx", "rockchip,rk3588";
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aliases {
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mmc0 = &sdhci;
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mmc1 = &sdmmc;
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mmc2 = &sdio;
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};
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chosen {
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stdout-path = "serial2:1500000n8";
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};
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adc_keys: adc-keys {
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compatible = "adc-keys";
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io-channels = <&saradc 0>;
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io-channel-names = "buttons";
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keyup-threshold-microvolt = <1800000>;
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poll-interval = <100>;
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button-maskrom {
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label = "Mask Rom";
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linux,code = <KEY_SETUP>;
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press-threshold-microvolt = <1750>;
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};
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};
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analog-sound {
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compatible = "audio-graph-card";
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label = "rk3588-es8316";
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dais = <&i2s0_8ch_p0>;
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hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&hp_detect>;
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routing = "MIC2", "Mic Jack",
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"Headphones", "HPOL",
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"Headphones", "HPOR";
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widgets = "Microphone", "Mic Jack",
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"Headphone", "Headphones";
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_pins>;
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power-led1 {
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gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "default-on";
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};
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hdd-led2 {
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gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "disk-activity";
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};
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};
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hdmi1-con {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi1_con_in: endpoint {
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remote-endpoint = <&hdmi1_out_con>;
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};
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};
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};
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/* Unnamed gated oscillator: 100MHz,3.3V,3225 */
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pcie30_port0_refclk: pcie30_port1_refclk: pcie-oscillator {
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compatible = "gated-fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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clock-output-names = "pcie30_refclk";
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vdd-supply = <&vcc3v3_pi6c_05>;
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};
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fan0: pwm-fan {
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compatible = "pwm-fan";
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#cooling-cells = <2>;
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cooling-levels = <0 64 128 192 255>;
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fan-supply = <&vcc12v_dcin>;
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pwms = <&pwm14 0 10000 0>;
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};
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/* M.2 E-KEY */
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&hym8563>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
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};
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typec_vin: regulator-typec-vin {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vbus5v0_typec_en>;
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regulator-name = "typec_vin";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc12v_dcin: regulator-vcc12v-dcin {
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compatible = "regulator-fixed";
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regulator-name = "vcc12v_dcin";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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vcc33_io64: regulator-vcc33-io64 {
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compatible = "regulator-fixed";
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regulator-name = "vcc33_io64";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc12v_dcin>;
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};
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vcc3v3_ekey: regulator-vcc3v3-ekey {
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compatible = "regulator-fixed";
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enable-active-high;
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gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&ekey_en>;
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regulator-name = "vcc3v3_ekey";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <50000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc3v3_lan: vcc3v3_lan_phy2: regulator-vcc3v3-lan {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_lan";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_3v3_s3>;
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};
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/* The PCIE30x4_PWREN_H controls two regulators */
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vcc3v3_mkey: vcc3v3_pi6c_05: regulator-vcc3v3-pi6c-05 {
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compatible = "regulator-fixed";
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enable-active-high;
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gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie30x4_pwren_h>;
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regulator-name = "vcc3v3_pi6c_05";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <5000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc3v3_sys: regulator-vcc3v3-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc12v_dcin>;
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};
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vcc5v0_sys: regulator-vcc5v0-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc12v_dcin>;
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};
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vcc5v0_usb20: vcc5v0_usb12: vcc5v0_usb34: regulator-vcc5v0-usb {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_host_pwren_h>;
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regulator-name = "vcc5v0_usb";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v1_nldo_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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vin-supply = <&vcc5v0_sys>;
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};
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};
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&combphy0_ps {
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status = "okay";
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};
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&combphy1_ps {
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status = "okay";
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};
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&combphy2_psu {
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status = "okay";
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};
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&cpu_b0 {
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cpu-supply = <&vdd_cpu_big0_s0>;
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};
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&cpu_b1 {
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cpu-supply = <&vdd_cpu_big0_s0>;
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};
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&cpu_b2 {
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cpu-supply = <&vdd_cpu_big1_s0>;
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};
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&cpu_b3 {
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cpu-supply = <&vdd_cpu_big1_s0>;
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};
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&cpu_l0 {
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cpu-supply = <&vdd_cpu_lit_s0>;
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};
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&cpu_l1 {
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cpu-supply = <&vdd_cpu_lit_s0>;
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};
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&cpu_l2 {
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cpu-supply = <&vdd_cpu_lit_s0>;
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};
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&cpu_l3 {
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cpu-supply = <&vdd_cpu_lit_s0>;
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};
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&gpu {
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mali-supply = <&vdd_gpu_s0>;
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status = "okay";
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};
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&hdmi1 {
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pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
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&hdmim1_tx1_scl &hdmim1_tx1_sda>;
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status = "okay";
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};
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&hdmi1_in {
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hdmi1_in_vp1: endpoint {
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remote-endpoint = <&vp1_out_hdmi1>;
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};
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};
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&hdmi1_out {
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hdmi1_out_con: endpoint {
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remote-endpoint = <&hdmi1_con_in>;
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};
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};
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&hdptxphy1 {
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0m2_xfer>;
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status = "okay";
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vdd_cpu_big0_s0: regulator@42 {
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compatible = "rockchip,rk8602";
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reg = <0x42>;
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fcs,suspend-voltage-selector = <1>;
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regulator-name = "vdd_cpu_big0_s0";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <550000>;
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regulator-max-microvolt = <1050000>;
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regulator-ramp-delay = <2300>;
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vin-supply = <&vcc5v0_sys>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_cpu_big1_s0: regulator@43 {
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compatible = "rockchip,rk8603", "rockchip,rk8602";
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reg = <0x43>;
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fcs,suspend-voltage-selector = <1>;
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regulator-name = "vdd_cpu_big1_s0";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <550000>;
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regulator-max-microvolt = <1050000>;
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regulator-ramp-delay = <2300>;
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vin-supply = <&vcc5v0_sys>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1m2_xfer>;
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status = "okay";
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vdd_npu_s0: regulator@42 {
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compatible = "rockchip,rk8602";
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reg = <0x42>;
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fcs,suspend-voltage-selector = <1>;
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regulator-name = "vdd_npu_s0";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <550000>;
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regulator-max-microvolt = <950000>;
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regulator-ramp-delay = <2300>;
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vin-supply = <&vcc5v0_sys>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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/* CAM0 connector */
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3m0_xfer>;
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};
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/* M.2 E-key */
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m1_xfer>;
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};
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/* RTC and LCD0 connector */
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&i2c6 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c6m0_xfer>;
|
|
status = "okay";
|
|
|
|
hym8563: rtc@51 {
|
|
compatible = "haoyu,hym8563";
|
|
reg = <0x51>;
|
|
#clock-cells = <0>;
|
|
clock-output-names = "wifi_32kout";
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rtc_int>;
|
|
};
|
|
};
|
|
|
|
/* Audio codec and CAM1 connector */
|
|
&i2c7 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c7m0_xfer>;
|
|
status = "okay";
|
|
|
|
es8316: audio-codec@11 {
|
|
compatible = "everest,es8316";
|
|
reg = <0x11>;
|
|
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
|
|
assigned-clock-rates = <12288000>;
|
|
clocks = <&cru I2S0_8CH_MCLKOUT>;
|
|
clock-names = "mclk";
|
|
#sound-dai-cells = <0>;
|
|
|
|
port {
|
|
es8316_p0_0: endpoint {
|
|
remote-endpoint = <&i2s0_8ch_p0_0>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
/* FUSB302 and LCD1 connector */
|
|
&i2c8 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c8m4_xfer>;
|
|
status = "okay";
|
|
|
|
usbc0: usb-typec@22 {
|
|
compatible = "fcs,fusb302";
|
|
reg = <0x22>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&usbc0_int>;
|
|
vbus-supply = <&typec_vin>;
|
|
|
|
usb_con: connector {
|
|
compatible = "usb-c-connector";
|
|
data-role = "dual";
|
|
label = "USB-C";
|
|
power-role = "source";
|
|
source-pdos =
|
|
<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
|
|
usbc0_orien_sw: endpoint {
|
|
remote-endpoint = <&usbdp_phy0_orientation_switch>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
|
|
usbc0_role_sw: endpoint {
|
|
remote-endpoint = <&dwc3_0_role_switch>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
|
|
dp_altmode_mux: endpoint {
|
|
remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c8m4_xfer {
|
|
rockchip,pins =
|
|
/* i2c8_scl_m4 */
|
|
<3 RK_PC2 9 &pcfg_pull_up_drv_level_6>,
|
|
/* i2c8_sda_m4 */
|
|
<3 RK_PC3 9 &pcfg_pull_up_drv_level_6>;
|
|
};
|
|
|
|
&i2s0_8ch {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2s0_lrck
|
|
&i2s0_mclk
|
|
&i2s0_sclk
|
|
&i2s0_sdi0
|
|
&i2s0_sdo0>;
|
|
status = "okay";
|
|
|
|
i2s0_8ch_p0: port {
|
|
i2s0_8ch_p0_0: endpoint {
|
|
dai-format = "i2s";
|
|
mclk-fs = <256>;
|
|
remote-endpoint = <&es8316_p0_0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&package_thermal {
|
|
polling-delay = <1000>;
|
|
|
|
trips {
|
|
package_fan0: package-fan0 {
|
|
hysteresis = <2000>;
|
|
temperature = <50000>;
|
|
type = "active";
|
|
};
|
|
|
|
package_fan1: package-fan1 {
|
|
hysteresis = <2000>;
|
|
temperature = <65000>;
|
|
type = "active";
|
|
};
|
|
};
|
|
|
|
cooling-maps {
|
|
map0 {
|
|
cooling-device = <&fan0 THERMAL_NO_LIMIT 1>;
|
|
trip = <&package_fan0>;
|
|
};
|
|
map1 {
|
|
cooling-device = <&fan0 2 THERMAL_NO_LIMIT>;
|
|
trip = <&package_fan1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* M.2 E-key */
|
|
&pcie2x1l0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie30x1_0_perstn_m1_l>;
|
|
reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
|
|
vpcie3v3-supply = <&vcc3v3_ekey>;
|
|
status = "okay";
|
|
};
|
|
|
|
/* RTL8125B_1 */
|
|
&pcie2x1l1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie30x1_1_perstn>;
|
|
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
|
|
vpcie3v3-supply = <&vcc3v3_lan>;
|
|
status = "okay";
|
|
};
|
|
|
|
/* RTL8125B_2 */
|
|
&pcie2x1l2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie20x1_2_perstn>;
|
|
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
|
|
vpcie3v3-supply = <&vcc3v3_lan_phy2>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie30phy {
|
|
data-lanes = <1 1 2 2>;
|
|
/* separate clock lines from the clock generator to phy and devices */
|
|
rockchip,rx-common-refclk-mode = <0 0 0 0>;
|
|
status = "okay";
|
|
};
|
|
|
|
/* ASMedia ASM1164 Sata controller */
|
|
&pcie3x2 {
|
|
/*
|
|
* The board has a "pcie_refclk" oscillator that needs enabling,
|
|
* so add it to the list of clocks.
|
|
*/
|
|
clocks = <&cru ACLK_PCIE_2L_MSTR>, <&cru ACLK_PCIE_2L_SLV>,
|
|
<&cru ACLK_PCIE_2L_DBI>, <&cru PCLK_PCIE_2L>,
|
|
<&cru CLK_PCIE_AUX1>, <&cru CLK_PCIE2L_PIPE>,
|
|
<&pcie30_port1_refclk>;
|
|
clock-names = "aclk_mst", "aclk_slv",
|
|
"aclk_dbi", "pclk",
|
|
"aux", "pipe",
|
|
"ref";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie30x2_perstn_m1_l>;
|
|
reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
|
|
vpcie3v3-supply = <&vcc33_io64>;
|
|
status = "okay";
|
|
};
|
|
|
|
/* M.2 M.key */
|
|
&pcie3x4 {
|
|
/*
|
|
* The board has a "pcie_refclk" oscillator that needs enabling,
|
|
* so add it to the list of clocks.
|
|
*/
|
|
clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>,
|
|
<&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>,
|
|
<&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>,
|
|
<&pcie30_port0_refclk>;
|
|
clock-names = "aclk_mst", "aclk_slv",
|
|
"aclk_dbi", "pclk",
|
|
"aux", "pipe",
|
|
"ref";
|
|
num-lanes = <2>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie30x4_perstn_m1_l>;
|
|
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
|
|
vpcie3v3-supply = <&vcc3v3_mkey>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pd_gpu {
|
|
domain-supply = <&vdd_gpu_s0>;
|
|
};
|
|
|
|
&pinctrl {
|
|
hym8563 {
|
|
rtc_int: rtc-int {
|
|
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
led_pins: led-pins {
|
|
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
|
|
<0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
pcie {
|
|
pcie20x1_2_perstn: pcie20x1-2-perstn {
|
|
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
pcie30x1_0_perstn_m1_l: pcie30x1-0-perstn-m1-l {
|
|
rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
pcie30x1_1_perstn: pcie30x1-1-perstn {
|
|
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
pcie30x2_perstn_m1_l: pcie30x2-perstn-m1-l {
|
|
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
pcie30x4_perstn_m1_l: pcie30x4-perstn-m1-l {
|
|
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
ekey_en: ekey-en {
|
|
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
|
|
pcie30x4_pwren_h: pcie30x4-pwren-h {
|
|
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
|
|
sound {
|
|
hp_detect: hp-detect {
|
|
rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
|
|
usb {
|
|
usb_host_pwren_h: usb-host-pwren-h {
|
|
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
vcc5v0_otg_en: vcc5v0-otg-en {
|
|
rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
gl3523_reset: rl3523-reset {
|
|
rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
usb-typec {
|
|
usbc0_int: usbc0-int {
|
|
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
vbus5v0_typec_en: vbus5v0-typec-en {
|
|
rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
hdmirx {
|
|
hdmirx_det: hdmirx-det {
|
|
rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
sdio-pwrseq {
|
|
wifi_enable_h: wifi-enable-h {
|
|
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
wireless-wlan {
|
|
wifi_host_wake_irq: wifi-host-wake-irq {
|
|
rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
};
|
|
};
|
|
|
|
bt {
|
|
bt_enable_h: bt-enable-h {
|
|
rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
bt_host_wake_l: bt-host-wake-l {
|
|
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
|
|
bt_wake_l: bt-wake-l {
|
|
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
|
|
dp {
|
|
dp1_hpd: dp1-hpd {
|
|
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pwm14 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pwm14m1_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&saradc {
|
|
vref-supply = <&avcc_1v8_s0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdhci {
|
|
bus-width = <8>;
|
|
max-frequency = <150000000>;
|
|
mmc-hs400-1_8v;
|
|
mmc-hs400-enhanced-strobe;
|
|
no-sdio;
|
|
no-sd;
|
|
non-removable;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdmmc {
|
|
bus-width = <4>;
|
|
cap-mmc-highspeed;
|
|
cap-sd-highspeed;
|
|
disable-wp;
|
|
max-frequency = <200000000>;
|
|
no-sdio;
|
|
no-mmc;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
|
|
sd-uhs-sdr104;
|
|
vmmc-supply = <&vcc_3v3_s3>;
|
|
vqmmc-supply = <&vccio_sd_s0>;
|
|
status = "okay";
|
|
};
|
|
|
|
/* M.2 E-KEY */
|
|
&sdio {
|
|
broken-cd;
|
|
bus-width = <4>;
|
|
cap-sdio-irq;
|
|
keep-power-in-suspend;
|
|
max-frequency = <150000000>;
|
|
mmc-pwrseq = <&sdio_pwrseq>;
|
|
no-sd;
|
|
no-mmc;
|
|
non-removable;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&sdiom0_pins>;
|
|
sd-uhs-sdr104;
|
|
vmmc-supply = <&vcc3v3_ekey>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sfc {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&fspim2_pins>;
|
|
status = "okay";
|
|
|
|
spi_flash: flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0x0>;
|
|
spi-max-frequency = <50000000>;
|
|
spi-rx-bus-width = <4>;
|
|
spi-tx-bus-width = <1>;
|
|
};
|
|
};
|
|
|
|
&spi2 {
|
|
status = "okay";
|
|
assigned-clocks = <&cru CLK_SPI2>;
|
|
assigned-clock-rates = <200000000>;
|
|
num-cs = <1>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
|
|
|
|
pmic@0 {
|
|
compatible = "rockchip,rk806";
|
|
reg = <0x0>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
|
|
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
|
spi-max-frequency = <1000000>;
|
|
system-power-controller;
|
|
|
|
vcc1-supply = <&vcc5v0_sys>;
|
|
vcc2-supply = <&vcc5v0_sys>;
|
|
vcc3-supply = <&vcc5v0_sys>;
|
|
vcc4-supply = <&vcc5v0_sys>;
|
|
vcc5-supply = <&vcc5v0_sys>;
|
|
vcc6-supply = <&vcc5v0_sys>;
|
|
vcc7-supply = <&vcc5v0_sys>;
|
|
vcc8-supply = <&vcc5v0_sys>;
|
|
vcc9-supply = <&vcc5v0_sys>;
|
|
vcc10-supply = <&vcc5v0_sys>;
|
|
vcc11-supply = <&vcc_2v0_pldo_s3>;
|
|
vcc12-supply = <&vcc5v0_sys>;
|
|
vcc13-supply = <&vcc_1v1_nldo_s3>;
|
|
vcc14-supply = <&vcc_1v1_nldo_s3>;
|
|
vcca-supply = <&vcc5v0_sys>;
|
|
|
|
rk806_dvs1_null: dvs1-null-pins {
|
|
pins = "gpio_pwrctrl1";
|
|
function = "pin_fun0";
|
|
};
|
|
|
|
rk806_dvs2_null: dvs2-null-pins {
|
|
pins = "gpio_pwrctrl2";
|
|
function = "pin_fun0";
|
|
};
|
|
|
|
rk806_dvs3_null: dvs3-null-pins {
|
|
pins = "gpio_pwrctrl3";
|
|
function = "pin_fun0";
|
|
};
|
|
|
|
regulators {
|
|
vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <950000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-name = "vdd_gpu_s0";
|
|
regulator-enable-ramp-delay = <400>;
|
|
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <950000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-name = "vdd_cpu_lit_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdd_log_s0: dcdc-reg3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <675000>;
|
|
regulator-max-microvolt = <750000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-name = "vdd_log_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <750000>;
|
|
};
|
|
};
|
|
|
|
vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <550000>;
|
|
regulator-max-microvolt = <950000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-name = "vdd_vdenc_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdd_ddr_s0: dcdc-reg5 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <675000>;
|
|
regulator-max-microvolt = <900000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-name = "vdd_ddr_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
regulator-suspend-microvolt = <850000>;
|
|
};
|
|
};
|
|
|
|
vdd2_ddr_s3: dcdc-reg6 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vdd2_ddr_s3";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_2v0_pldo_s3: dcdc-reg7 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <2000000>;
|
|
regulator-max-microvolt = <2000000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-name = "vdd_2v0_pldo_s3";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <2000000>;
|
|
};
|
|
};
|
|
|
|
vcc_3v3_s3: dcdc-reg8 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-name = "vcc_3v3_s3";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
};
|
|
};
|
|
|
|
vddq_ddr_s0: dcdc-reg9 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-name = "vddq_ddr_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_1v8_s3: dcdc-reg10 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc_1v8_s3";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
avcc_1v8_s0: pldo-reg1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "avcc_1v8_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vcc_1v8_s0: pldo-reg2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "vcc_1v8_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
avdd_1v2_s0: pldo-reg3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-name = "avdd_1v2_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vcc_3v3_s0: pldo-reg4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-name = "vcc_3v3_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <3300000>;
|
|
};
|
|
};
|
|
|
|
vccio_sd_s0: pldo-reg5 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-name = "vccio_sd_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
pldo6_s3: pldo-reg6 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-name = "pldo6_s3";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <1800000>;
|
|
};
|
|
};
|
|
|
|
vdd_0v75_s3: nldo-reg1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <750000>;
|
|
regulator-max-microvolt = <750000>;
|
|
regulator-name = "vdd_0v75_s3";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <750000>;
|
|
};
|
|
};
|
|
|
|
vdd_ddr_pll_s0: nldo-reg2 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <850000>;
|
|
regulator-name = "vdd_ddr_pll_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <850000>;
|
|
};
|
|
};
|
|
|
|
avdd_0v75_s0: nldo-reg3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <750000>;
|
|
regulator-max-microvolt = <750000>;
|
|
regulator-name = "avdd_0v75_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
vdd_0v85_s0: nldo-reg4 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <850000>;
|
|
regulator-max-microvolt = <850000>;
|
|
regulator-name = "vdd_0v85_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <837500>;
|
|
};
|
|
};
|
|
|
|
vdd_0v75_s0: nldo-reg5 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
regulator-min-microvolt = <750000>;
|
|
regulator-max-microvolt = <750000>;
|
|
regulator-name = "vdd_0v75_s0";
|
|
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
regulator-suspend-microvolt = <750000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&tsadc {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
pinctrl-0 = <&uart2m0_xfer>;
|
|
status = "okay";
|
|
};
|
|
|
|
/* Connected to M.2 E-key */
|
|
&uart6 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy0_otg {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy1_otg {
|
|
/* connected to USB3 hub, which is powered by vcc5v0_usb12 */
|
|
phy-supply = <&vcc5v0_usb12>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy2_host {
|
|
/* connected to USB2 hub, which is powered by vcc5v0_usb20 */
|
|
phy-supply = <&vcc5v0_usb20>;
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&u2phy3_host {
|
|
phy-supply = <&vcc5v0_usb20>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host1_ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host1_ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host0_xhci {
|
|
usb-role-switch;
|
|
status = "okay";
|
|
|
|
port {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
dwc3_0_role_switch: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&usbc0_role_sw>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&usb_host1_xhci {
|
|
dr_mode = "host";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
|
|
/* 2.0 hub on port 1 */
|
|
hub_2_0: hub@1 {
|
|
compatible = "usb5e3,610";
|
|
reg = <1>;
|
|
peer-hub = <&hub_3_0>;
|
|
vdd-supply = <&vcc_3v3_s3>;
|
|
};
|
|
|
|
/* 3.0 hub on port 4 */
|
|
hub_3_0: hub@2 {
|
|
compatible = "usb5e3,620";
|
|
reg = <2>;
|
|
peer-hub = <&hub_2_0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&gl3523_reset>;
|
|
reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>;
|
|
vdd-supply = <&vcc_3v3_s3>;
|
|
};
|
|
};
|
|
|
|
&usbdp_phy0 {
|
|
mode-switch;
|
|
orientation-switch;
|
|
sbu1-dc-gpios = <&gpio4 RK_PB7 GPIO_ACTIVE_HIGH>;
|
|
sbu2-dc-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
|
|
port {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
usbdp_phy0_orientation_switch: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&usbc0_orien_sw>;
|
|
};
|
|
|
|
usbdp_phy0_dp_altmode_mux: endpoint@1 {
|
|
reg = <1>;
|
|
remote-endpoint = <&dp_altmode_mux>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&usbdp_phy1 {
|
|
rockchip,dp-lane-mux = <2 3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&vop {
|
|
status = "okay";
|
|
};
|
|
|
|
&vop_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vp1 {
|
|
vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {
|
|
reg = <ROCKCHIP_VOP2_EP_HDMI1>;
|
|
remote-endpoint = <&hdmi1_in_vp1>;
|
|
};
|
|
};
|