mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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4a2fdf91e1
Edgeble-6TOPS modules configure HDMI1 for HDMI Out from RK3588. Enable it on Edgeble-6TOPS IO Board dtsi. Cc: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Signed-off-by: Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20241227132936.168100-1-jagan@edgeble.ai Signed-off-by: Heiko Stuebner <heiko@sntech.de>
325 lines
6.4 KiB
Plaintext
325 lines
6.4 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/soc/rockchip,vop2.h>
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/ {
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chosen {
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stdout-path = "serial2:1500000n8";
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};
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hdmi1-con {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi1_con_in: endpoint {
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remote-endpoint = <&hdmi1_out_con>;
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};
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};
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};
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/* Unnamed gated oscillator: 100MHz,3.3V,3225 */
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pcie30_port0_refclk: pcie30_port1_refclk: pcie-oscillator {
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compatible = "gated-fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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clock-output-names = "pcie30_refclk";
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vdd-supply = <&vcc3v3_pi6c_05>;
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};
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vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie2x1l0";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <5000>;
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vin-supply = <&vcc_3v3_s3>;
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};
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vcc3v3_bkey: regulator-vcc3v3-bkey {
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compatible = "regulator-fixed";
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enable-active-high;
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gpios = <&gpio2 RK_PC4 GPIO_ACTIVE_HIGH>; /* PCIE_4G_PWEN */
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_4g_pwen>;
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regulator-name = "vcc3v3_bkey";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <5000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc3v3_pcie30: vcc3v3_pi6c_05: regulator-vcc3v3-pi6c-05 {
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compatible = "regulator-fixed";
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enable-active-high;
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gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; /* PCIE30x4_PWREN_H */
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pinctrl-names = "default";
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pinctrl-0 = <&pcie30x4_pwren_h>;
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regulator-name = "vcc3v3_pcie30";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <5000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc5v0_host: regulator-vcc5v0-host {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_host_en>;
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regulator-name = "vcc5v0_host";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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vin-supply = <&vcc5v0_sys>;
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};
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};
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&combphy0_ps {
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status = "okay";
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};
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&combphy1_ps {
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status = "okay";
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};
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&combphy2_psu {
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status = "okay";
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};
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&hdmi1 {
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status = "okay";
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};
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&hdmi1_in {
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hdmi1_in_vp0: endpoint {
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remote-endpoint = <&vp0_out_hdmi1>;
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};
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};
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&hdmi1_out {
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hdmi1_out_con: endpoint {
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remote-endpoint = <&hdmi1_con_in>;
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};
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};
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&hdptxphy1 {
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status = "okay";
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};
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&i2c6 {
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status = "okay";
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hym8563: rtc@51 {
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compatible = "haoyu,hym8563";
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reg = <0x51>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
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#clock-cells = <0>;
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clock-output-names = "hym8563";
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pinctrl-names = "default";
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pinctrl-0 = <&hym8563_int>;
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wakeup-source;
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};
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};
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/* ETH */
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&pcie2x1l0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie2_0_rst>;
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reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; /* PCIE20_1_PERST_L */
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vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
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status = "okay";
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};
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&pcie30phy {
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data-lanes = <1 1 2 2>;
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/* separate clock lines from the clock generator to phy and devices */
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rockchip,rx-common-refclk-mode = <0 0 0 0>;
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status = "okay";
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};
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/* M-Key */
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&pcie3x2 {
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/*
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* The board has a "pcie_refclk" oscillator that needs enabling,
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* so add it to the list of clocks.
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*/
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clocks = <&cru ACLK_PCIE_2L_MSTR>, <&cru ACLK_PCIE_2L_SLV>,
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<&cru ACLK_PCIE_2L_DBI>, <&cru PCLK_PCIE_2L>,
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<&cru CLK_PCIE_AUX1>, <&cru CLK_PCIE2L_PIPE>,
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<&pcie30_port1_refclk>;
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clock-names = "aclk_mst", "aclk_slv",
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"aclk_dbi", "pclk",
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"aux", "pipe",
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"ref";
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num-lanes = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie30x2_perstn_m1_l>;
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reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; /* PCIE30X2_PERSTn_M1_L */
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vpcie3v3-supply = <&vcc3v3_pcie30>;
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status = "okay";
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};
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/* B-Key and E-Key */
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&pcie3x4 {
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/*
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* The board has a "pcie_refclk" oscillator that needs enabling,
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* so add it to the list of clocks.
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*/
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clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>,
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<&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>,
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<&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>,
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<&pcie30_port0_refclk>;
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clock-names = "aclk_mst", "aclk_slv",
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"aclk_dbi", "pclk",
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"aux", "pipe",
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"ref";
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pinctrl-names = "default";
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pinctrl-0 = <&pcie30x4_perstn_m1_l>;
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reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; /* PCIE30X4_PERSTn_M1_L */
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vpcie3v3-supply = <&vcc3v3_bkey>;
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status = "okay";
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};
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&pinctrl {
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pcie2 {
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pcie2_0_rst: pcie2-0-rst {
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rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pcie3 {
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pcie30x2_perstn_m1_l: pcie30x2-perstn-m1-l {
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rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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pcie_4g_pwen: pcie-4g-pwen {
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rockchip,pins = <2 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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pcie30x4_perstn_m1_l: pcie30x4-perstn-m1-l {
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rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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pcie30x4_pwren_h: pcie30x4-pwren-h {
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rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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hym8563 {
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hym8563_int: hym8563-int {
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rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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usb {
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vcc5v0_host_en: vcc5v0-host-en {
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rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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/* FAN */
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&pwm2 {
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pinctrl-0 = <&pwm2m1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&sata0 {
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status = "okay";
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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no-sdio;
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no-mmc;
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sd-uhs-sdr104;
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vmmc-supply = <&vcc_3v3_s3>;
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vqmmc-supply = <&vccio_sd_s0>;
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status = "okay";
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};
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&uart2 {
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pinctrl-0 = <&uart2m0_xfer>;
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status = "okay";
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};
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/* RS232 */
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&uart6 {
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pinctrl-0 = <&uart6m0_xfer>;
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pinctrl-names = "default";
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status = "okay";
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};
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/* RS485 */
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&uart7 {
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pinctrl-0 = <&uart7m2_xfer>;
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pinctrl-names = "default";
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status = "okay";
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};
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&u2phy2 {
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status = "okay";
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};
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&u2phy2_host {
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/* connected to USB hub, which is powered by vcc5v0_sys */
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phy-supply = <&vcc5v0_sys>;
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status = "okay";
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};
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&u2phy3 {
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status = "okay";
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};
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&u2phy3_host {
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phy-supply = <&vcc5v0_host>;
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status = "okay";
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};
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&usb_host0_ehci {
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status = "okay";
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};
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&usb_host0_ohci {
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status = "okay";
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};
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&usb_host1_ehci {
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status = "okay";
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};
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&usb_host1_ohci {
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status = "okay";
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};
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&usb_host2_xhci {
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status = "okay";
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};
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&vop_mmu {
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status = "okay";
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};
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&vop {
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status = "okay";
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};
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&vp0 {
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vp0_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {
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reg = <ROCKCHIP_VOP2_EP_HDMI1>;
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remote-endpoint = <&hdmi1_in_vp0>;
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};
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};
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