linux-loongson/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
Linus Torvalds 115e74a29b soc: dt changes for 6.17
There are a few new variants of existing chips:
 
  - mt6572 is an older mobile phone chip from mediatek that was
    extremely popular a decade ago but never got upstreamed until now.
 
  - exynos2200 is a recent high-end mobile phone chip used in a
    few Samsung phones like the Galaxy S22
 
  - Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M
    (R8A779H0) and used in automotive applications
 
  - Tegra264 is a new chip from NVIDIA, but support is fairly minimal
    for now, and not much information is public about it.
 
 There are five more chips in a separate branch, as those are new
 chip families that I merged along with the necessary infrastructure.
 
 New board support is not that exciting, with a total of 33 newly
 added machines here:
 
  - Evaluation platforms for the chips above, plus TI am62d2 and
    Sophgo sg2042.
 
  - Six 32-bit industrial boards based on stm32, imx6 and am33 chips,
    plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and
    imx95.
 
  - Two newly added ASPEED BMC based motherboards, and one that got
    removed
 
  - Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit
    msm8976 SoCs
 
  - Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1
 
  - A set-top box based on Amlogic meson-gxm.
 
 Updates for existing machines are spread over all the above families.
 One notable change here is support for the RP1 I/O chip used in
 Raspberry Pi 5.
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Merge tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
 "There are a few new variants of existing chips:

   - mt6572 is an older mobile phone chip from mediatek that was
     extremely popular a decade ago but never got upstreamed until now

   - exynos2200 is a recent high-end mobile phone chip used in a few
     Samsung phones like the Galaxy S22

   - Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M
     (R8A779H0) and used in automotive applications

   - Tegra264 is a new chip from NVIDIA, but support is fairly minimal
     for now, and not much information is public about it

  There are five more chips in a separate branch, as those are new chip
  families that I merged along with the necessary infrastructure.

  New board support is not that exciting, with a total of 33 newly added
  machines here:

   - Evaluation platforms for the chips above, plus TI am62d2 and Sophgo
     sg2042

   - Six 32-bit industrial boards based on stm32, imx6 and am33 chips,
     plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and
     imx95

   - Two newly added ASPEED BMC based motherboards, and one that got
     removed

   - Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit
     msm8976 SoCs

   - Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1

   - A set-top box based on Amlogic meson-gxm

  Updates for existing machines are spread over all the above families.
  One notable change here is support for the RP1 I/O chip used in
  Raspberry Pi 5"

* tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (606 commits)
  riscv: dts: sophgo: fix mdio node name for CV180X
  riscv: dts: sophgo: sophgo-srd3-10: reserve uart0 device
  riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree
  riscv: dts: sophgo: add Sophgo SG2042_EVB_V1.X board device tree
  dt-bindings: riscv: add Sophgo SG2042_EVB_V1.X/V2.0 bindings
  riscv: dts: sophgo: add ethernet GMAC device for sg2042
  riscv: dts: sophgo: Enable ethernet device for Huashan Pi
  riscv: dts: sophgo: Add mdio multiplexer device for cv18xx
  riscv: dts: sophgo: Add ethernet device for cv18xx
  riscv: dts: sophgo: sg2044: add pmu configuration
  riscv: dts: sophgo: sg2044: add ziccrse extension
  riscv: dts: sophgo: add zfh for sg2042
  riscv: dts: sophgo: add ziccrse for sg2042
  riscv: dts: sophgo: Add xtheadvector to the sg2042 devicetree
  riscv: dts: sophgo: sg2044: add PCIe device support for SG2044
  riscv: dts: sophgo: sg2044: add MSI device support for SG2044
  riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC
  riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC
  dt-bindings: soc: sophgo: Move SoCs/boards from riscv into soc, add SG2000
  riscv: dts: sophgo: sg2044: Add missing riscv,cbop-block-size property
  ...
2025-07-29 11:04:52 -07:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyelec.com)
*
* Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
*/
/dts-v1/;
#include "rk3568-nanopi-r5s.dtsi"
/ {
model = "FriendlyElec NanoPi R5S";
compatible = "friendlyarm,nanopi-r5s", "rockchip,rk3568";
aliases {
ethernet0 = &gmac0;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&gpio4_a0_k1_pin>;
pinctrl-names = "default";
button-reset {
debounce-interval = <50>;
gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
label = "RESET";
linux,code = <KEY_RESTART>;
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
led-lan1 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
label = "LAN-1";
};
led-lan2 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
gpios = <&gpio3 RK_PD7 GPIO_ACTIVE_HIGH>;
label = "LAN-2";
};
power_led: led-sys {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
label = "SYS";
linux,default-trigger = "heartbeat";
};
led-wan {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_WAN;
gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
label = "WAN";
};
};
};
&gmac0 {
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
assigned-clock-rates = <0>, <125000000>;
clock_in_out = "output";
phy-handle = <&rgmii_phy0>;
phy-mode = "rgmii";
phy-supply = <&vcc_3v3>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
snps,reset-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 15ms, 50ms for rtl8211f */
snps,reset-delays-us = <0 15000 50000>;
tx_delay = <0x3c>;
rx_delay = <0x2f>;
status = "okay";
};
&mdio0 {
rgmii_phy0: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
pinctrl-0 = <&eth_phy0_reset_pin>;
pinctrl-names = "default";
};
};
&pcie2x1 {
num-lanes = <1>;
reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&pcie30phy {
data-lanes = <1 2>;
status = "okay";
};
&pcie3x1 {
num-lanes = <1>;
reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
&pcie3x2 {
num-lanes = <1>;
num-ib-windows = <8>;
num-ob-windows = <8>;
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};
&pinctrl {
gmac0 {
eth_phy0_reset_pin: eth-phy0-reset-pin {
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
gpio-keys {
gpio4_a0_k1_pin: gpio4-a0-k1-pin {
rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gpio-leds {
lan1_led_pin: lan1-led-pin {
rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
lan2_led_pin: lan2-led-pin {
rockchip,pins = <3 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
};
sys_led_pin: sys-led-pin {
rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
wan_led_pin: wan-led-pin {
rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};