mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-01 06:39:05 +00:00
53b6445ad0
Hardware CS has a very slow rise time of about 6us,
causing transmission errors when CS does not reach
high between transaction.
It looks like it's not driven actively when transitioning
from low to high but switched to input, so only the CPU
pull-up pulls it high, slowly. Transitions from high to low
are fast. On the oscilloscope, CS looks like an irregular sawtooth
pattern like this:
_____
^ / |
^ /| / |
/| / | / |
/ | / | / |
___/ |___/ |_____/ |___
With cs-gpios we have a CS rise time of about 20ns, as it should be,
and CS looks rectangular.
This fixes the data errors when running a flashcp loop against a
m25p40 spi flash.
With the Rockchip 6.1 kernel we see the same slow rise time, but
for some reason CS is always high for long enough to reach a solid
high.
The RK3399 and RK3588 SoCs use the same SPI driver, so we also
checked our "Puma" (RK3399) and "Tiger" (RK3588) boards.
They do not have this problem. Hardware CS rise time is good.
Fixes: c484cf93f6 ("arm64: dts: rockchip: add PX30-µQ7 (Ringneck) SoM with Haikou baseboard")
Cc: stable@vger.kernel.org
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@cherry.de>
Link: https://lore.kernel.org/r/20250627131715.1074308-1-jakob.unterwurzacher@cherry.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
452 lines
8.9 KiB
Plaintext
452 lines
8.9 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Theobroma Systems Design und Consulting GmbH
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*/
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/dts-v1/;
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#include "px30.dtsi"
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#include <dt-bindings/leds/common.h>
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/ {
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aliases {
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i2c10 = &i2c10;
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mmc0 = &emmc;
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mmc1 = &sdio;
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rtc0 = &rtc_twi;
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rtc1 = &rk809;
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};
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/* allows userspace to control the gate of the ATtiny UPDI pass FET via sysfs */
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attiny-updi-gate-regulator {
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compatible = "regulator-output";
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vout-supply = <&vg_attiny_updi>;
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};
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emmc_pwrseq: emmc-pwrseq {
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compatible = "mmc-pwrseq-emmc";
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pinctrl-0 = <&emmc_reset>;
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pinctrl-names = "default";
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reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&module_led_pin>;
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status = "okay";
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module_led: led-0 {
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gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
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function = LED_FUNCTION_HEARTBEAT;
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linux,default-trigger = "heartbeat";
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color = <LED_COLOR_ID_AMBER>;
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};
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};
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vcc5v0_sys: regulator-vccsys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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};
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&cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu1 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu2 {
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cpu-supply = <&vdd_arm>;
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};
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&cpu3 {
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cpu-supply = <&vdd_arm>;
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};
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&emmc {
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bus-width = <8>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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mmc-pwrseq = <&emmc_pwrseq>;
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non-removable;
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vmmc-supply = <&vcc_3v3>;
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vqmmc-supply = <&vcc_emmc>;
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status = "okay";
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};
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/* On-module TI DP83825I PHY but no connector, enable in carrierboard */
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&gmac {
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phy-handle = <&dp83825>;
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phy-supply = <&vcc_3v3>;
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clock_in_out = "output";
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};
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&gpio2 {
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/*
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* The Qseven BIOS_DISABLE signal on the PX30-µQ7 keeps the on-module
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* eMMC powered-down initially (in fact it keeps the reset signal
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* asserted). BIOS_DISABLE_OVERRIDE pin allows to re-enable eMMC after
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* the SPL has been booted from SD Card.
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*/
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bios-disable-override-hog {
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gpios = <RK_PB5 GPIO_ACTIVE_LOW>;
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output-high;
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line-name = "bios_disable_override";
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gpio-hog;
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};
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/*
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* The BIOS_DISABLE hog is a feedback pin for the actual status of the
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* signal, ignoring the BIOS_DISABLE_OVERRIDE logic. This usually
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* represents the state of a switch on the baseboard.
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*/
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bios-disable-n-hog {
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gpios = <RK_PC2 GPIO_ACTIVE_LOW>;
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line-name = "bios_disable";
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input;
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gpio-hog;
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};
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};
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&gpu {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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rk809: pmic@20 {
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compatible = "rockchip,rk809";
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reg = <0x20>;
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interrupt-parent = <&gpio0>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-0 = <&pmic_int>;
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pinctrl-names = "default";
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#clock-cells = <0>;
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clock-output-names = "xin32k";
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system-power-controller;
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wakeup-source;
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vcc1-supply = <&vcc5v0_sys>;
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vcc2-supply = <&vcc5v0_sys>;
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vcc3-supply = <&vcc5v0_sys>;
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vcc4-supply = <&vcc5v0_sys>;
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vcc5-supply = <&vcc_3v3>;
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vcc6-supply = <&vcc_3v3>;
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vcc7-supply = <&vcc_3v3>;
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vcc9-supply = <&vcc5v0_sys>;
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regulators {
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vdd_log: DCDC_REG1 {
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regulator-name = "vdd_log";
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regulator-min-microvolt = <950000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <950000>;
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};
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};
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vdd_arm: DCDC_REG2 {
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <950000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <6001>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <950000>;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-name = "vcc_ddr";
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vcc_3v0_1v8: vcc_emmc: DCDC_REG4 {
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regulator-name = "vcc_3v0_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3000000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3000000>;
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};
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};
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vcc_3v3: DCDC_REG5 {
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regulator-name = "vcc_3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcc_1v8: LDO_REG2 {
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regulator-name = "vcc_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc_1v0: LDO_REG3 {
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regulator-name = "vcc_1v0";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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vccio_sd: LDO_REG5 {
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regulator-name = "vccio_sd";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcc_lcd: LDO_REG7 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vcc_lcd";
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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vcc_1v8_lcd: LDO_REG8 {
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regulator-name = "vcc_1v8_lcd";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcca_1v8: LDO_REG9 {
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regulator-name = "vcca_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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/* supplies the gate of the ATtiny UPDI pass FET */
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vg_attiny_updi: SWITCH_REG1 {
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regulator-name = "vg_attiny_updi";
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};
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};
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};
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};
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&i2c1 {
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status = "okay";
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/* SE05x is limited to Fast Mode */
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clock-frequency = <400000>;
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fan: fan@18 {
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compatible = "tsd,mule", "ti,amc6821";
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reg = <0x18>;
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i2c-mux {
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compatible = "tsd,mule-i2c-mux";
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#address-cells = <1>;
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#size-cells = <0>;
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i2c10: i2c@0 {
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reg = <0x0>;
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#address-cells = <1>;
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#size-cells = <0>;
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rtc_twi: rtc@6f {
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compatible = "isil,isl1208";
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reg = <0x6f>;
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};
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};
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};
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};
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};
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&i2s0_8ch {
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rockchip,trcm-sync-tx-only;
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pinctrl-0 = <&i2s0_8ch_sclktx &i2s0_8ch_lrcktx
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&i2s0_8ch_sdo0 &i2s0_8ch_sdi0>;
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};
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&io_domains {
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vccio1-supply = <&vcc_3v3>;
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vccio2-supply = <&vccio_sd>;
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vccio3-supply = <&vcc_3v3>;
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vccio4-supply = <&vcc_3v3>;
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vccio5-supply = <&vcc_3v3>;
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vccio6-supply = <&vcc_emmc>;
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vccio-oscgpi-supply = <&vcc_3v3>;
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status = "okay";
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};
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&mdio {
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dp83825: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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pinctrl-names = "default";
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pinctrl-0 = <&phy_rst>;
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reset-assert-us = <50000>;
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reset-deassert-us = <50000>;
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reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
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};
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};
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&pinctrl {
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emmc {
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emmc_reset: emmc-reset {
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rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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ethernet {
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phy_rst: phy-rst {
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rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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leds {
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module_led_pin: module-led-pin {
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rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pmic {
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pmic_int: pmic-int {
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rockchip,pins =
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<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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spi1 {
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spi1_csn0_gpio_pin: spi1-csn0-gpio-pin {
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rockchip,pins =
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<3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
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};
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spi1_csn1_gpio_pin: spi1-csn1-gpio-pin {
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rockchip,pins =
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<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
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};
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};
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};
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&pmu_io_domains {
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pmuio1-supply = <&vcc_3v3>;
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pmuio2-supply = <&vcc_3v3>;
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status = "okay";
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};
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&saradc {
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vref-supply = <&vcc_1v8>;
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status = "okay";
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};
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&sdmmc {
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vqmmc-supply = <&vccio_sd>;
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};
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&spi1 {
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/*
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* Hardware CS has a very slow rise time of about 6us,
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* causing transmission errors.
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* With cs-gpios we have a rise time of about 20ns.
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*/
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cs-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>, <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_clk &spi1_csn0_gpio_pin &spi1_csn1_gpio_pin &spi1_miso &spi1_mosi>;
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};
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&tsadc {
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status = "okay";
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};
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&u2phy {
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status = "okay";
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};
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&u2phy_host {
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status = "okay";
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};
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&uart5 {
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/delete-property/ dmas;
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/delete-property/ dma-names;
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pinctrl-0 = <&uart5_xfer>;
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};
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/* Mule UCAN */
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&usb_host0_ehci {
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status = "okay";
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};
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&usb_host0_ohci {
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status = "okay";
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};
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&wdt {
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status = "okay";
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};
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