mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-08-31 22:23:05 +00:00
f9b6e9976c
Add basic support for the Yuridenki-Shokai Kakip board based on R9A09G057H48, including: - Memory - OSTM0 - OSTM7 - Pin Control - Input clocks - SCIF - SDHI0 Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250116144752.1738574-5-iwamatsu@nigauri.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
137 lines
2.3 KiB
Plaintext
137 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
/*
|
|
* Device Tree Source for Yuridenki-Shokai the Kakip board
|
|
*
|
|
* Copyright (C) 2024 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/pinctrl/renesas,r9a09g057-pinctrl.h>
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include "r9a09g057.dtsi"
|
|
|
|
/ {
|
|
model = "Yuridenki-Shokai Kakip Board based on r9a09g057h48";
|
|
compatible = "yuridenki,kakip", "renesas,r9a09g057h48", "renesas,r9a09g057";
|
|
|
|
aliases {
|
|
serial0 = &scif;
|
|
mmc0 = &sdhi0;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
memory@48000000 {
|
|
device_type = "memory";
|
|
/* first 128MB is reserved for secure area. */
|
|
reg = <0x0 0x48000000 0x1 0xF8000000>;
|
|
};
|
|
|
|
reg_3p3v: regulator-3v3 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "fixed-3.3V";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vqmmc_sdhi0: regulator-vccq-sdhi0 {
|
|
compatible = "regulator-gpio";
|
|
regulator-name = "SDHI0 VccQ";
|
|
gpios = <&pinctrl RZV2H_GPIO(A, 0) GPIO_ACTIVE_HIGH>;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpios-states = <0>;
|
|
states = <3300000 0>, <1800000 1>;
|
|
};
|
|
};
|
|
|
|
&ostm0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ostm1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ostm2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ostm3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ostm4 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ostm5 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ostm6 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ostm7 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
scif_pins: scif {
|
|
pins = "SCIF_RXD", "SCIF_TXD";
|
|
};
|
|
|
|
sd0-pwr-en-hog {
|
|
gpio-hog;
|
|
gpios = <RZV2H_GPIO(A, 1) GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
line-name = "sd0_pwr_en";
|
|
};
|
|
|
|
sdhi0_pins: sd0 {
|
|
sd0-clk {
|
|
pins = "SD0CLK";
|
|
renesas,output-impedance = <3>;
|
|
slew-rate = <0>;
|
|
};
|
|
|
|
sd0-data {
|
|
pins = "SD0DAT0", "SD0DAT1", "SD0DAT2", "SD0DAT3", "SD0CMD";
|
|
input-enable;
|
|
renesas,output-impedance = <3>;
|
|
slew-rate = <0>;
|
|
};
|
|
|
|
sd0-mux {
|
|
pinmux = <RZV2H_PORT_PINMUX(A, 5, 15)>; /* SD0_CD */
|
|
};
|
|
};
|
|
};
|
|
|
|
&qextal_clk {
|
|
clock-frequency = <24000000>;
|
|
};
|
|
|
|
&scif {
|
|
pinctrl-0 = <&scif_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&sdhi0 {
|
|
pinctrl-0 = <&sdhi0_pins>;
|
|
pinctrl-names = "default";
|
|
vmmc-supply = <®_3p3v>;
|
|
vqmmc-supply = <&vqmmc_sdhi0>;
|
|
bus-width = <4>;
|
|
|
|
status = "okay";
|
|
};
|