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8b6a006c91
The GICv3 interrupts binding does not have a cpumask. The CPU mask only applies to pre-GICv3. So just drop using them from GICv3 systems. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230206002136.29401-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
26 lines
487 B
Plaintext
26 lines
487 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Device Tree Source for the RZ/G2LC R9A07G044C1 SoC specific parts
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*
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* Copyright (C) 2021 Renesas Electronics Corp.
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*/
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/dts-v1/;
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#include "r9a07g044.dtsi"
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/ {
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compatible = "renesas,r9a07g044c1", "renesas,r9a07g044";
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cpus {
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/delete-node/ cpu-map;
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/delete-node/ cpu@100;
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};
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};
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&soc {
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/delete-node/ ssi@1004a800;
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/delete-node/ serial@1004c800;
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/delete-node/ adc@10059000;
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/delete-node/ ethernet@11c30000;
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};
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