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0dde247f50
Describe the location in the E-FUSE block of the PLL and AFE tuning parameters for the Universal Flash Storage controller. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/3e4fca228eb049d54a1ae520104558505dbdf803.1741179629.git.geert+renesas@glider.be
30 lines
482 B
Plaintext
30 lines
482 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Device Tree Source for the R-Car S4-8 (R8A779F4) SoC
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*
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* Copyright (C) 2023 Renesas Electronics Corp.
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*/
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#include "r8a779f0.dtsi"
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/ {
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compatible = "renesas,r8a779f4", "renesas,r8a779f0";
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};
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&fuse {
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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ufs_tune: calib@144 {
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reg = <0x144 0x08>;
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};
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};
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};
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&ufs {
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nvmem-cells = <&ufs_tune>;
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nvmem-cell-names = "calibration";
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};
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