linux-loongson/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
Marek Vasut 399f14ff66 arm64: dts: renesas: rcar: Add boot phase tags
bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT.  Add bootph-all for all nodes that are used in the
bootloader on Renesas R-Car SoCs.

All SoC require CPG clock and its input clock, RST Reset, PFC pin
control and PRR ID register access during all stages of the boot
process, those are marked using bootph-all property, and so is the SoC
bus node which contains these IP.

Each board console UART is also marked as bootph-all to make it
available in all stages of the boot process.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250209180616.160253-2-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-02-21 16:23:01 +01:00

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// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Falcon CPU board
*
* Copyright (C) 2020 Renesas Electronics Corp.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "r8a779a0.dtsi"
/ {
model = "Renesas Falcon CPU board";
compatible = "renesas,falcon-cpu", "renesas,r8a779a0";
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
serial0 = &scif0;
};
chosen {
stdout-path = "serial0:115200n8";
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&keys_pins>;
pinctrl-names = "default";
key-1 {
gpios = <&gpio6 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_1>;
label = "SW47";
wakeup-source;
debounce-interval = <20>;
};
key-2 {
gpios = <&gpio6 19 GPIO_ACTIVE_LOW>;
linux,code = <KEY_2>;
label = "SW48";
wakeup-source;
debounce-interval = <20>;
};
key-3 {
gpios = <&gpio6 20 GPIO_ACTIVE_LOW>;
linux,code = <KEY_3>;
label = "SW49";
wakeup-source;
debounce-interval = <20>;
};
};
leds {
compatible = "gpio-leds";
led-1 {
gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <1>;
};
led-2 {
gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <2>;
};
led-3 {
gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <3>;
};
};
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
memory@500000000 {
device_type = "memory";
reg = <0x5 0x00000000 0x0 0x80000000>;
};
memory@600000000 {
device_type = "memory";
reg = <0x6 0x00000000 0x0 0x80000000>;
};
memory@700000000 {
device_type = "memory";
reg = <0x7 0x00000000 0x0 0x80000000>;
};
mini-dp-con {
compatible = "dp-connector";
label = "CN5";
type = "mini";
port {
mini_dp_con_in: endpoint {
remote-endpoint = <&sn65dsi86_out>;
};
};
};
reg_1p2v: regulator-1p2v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-boot-on;
regulator-always-on;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
sn65dsi86_refclk: clk-x6 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <38400000>;
};
};
&dsi0 {
status = "okay";
ports {
port@1 {
dsi0_out: endpoint {
remote-endpoint = <&sn65dsi86_in>;
data-lanes = <1 2 3 4>;
};
};
};
};
&du {
status = "okay";
};
&extal_clk {
clock-frequency = <16666666>;
};
&extalr_clk {
clock-frequency = <32768>;
};
&i2c0 {
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <400000>;
eeprom@50 {
compatible = "rohm,br24g01", "atmel,24c01";
label = "cpu-board";
reg = <0x50>;
pagesize = <8>;
};
};
&i2c1 {
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <400000>;
bridge@2c {
pinctrl-0 = <&irq0_pins>;
pinctrl-names = "default";
compatible = "ti,sn65dsi86";
reg = <0x2c>;
clocks = <&sn65dsi86_refclk>;
clock-names = "refclk";
interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_HIGH>;
vccio-supply = <&reg_1p8v>;
vpll-supply = <&reg_1p8v>;
vcca-supply = <&reg_1p2v>;
vcc-supply = <&reg_1p2v>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
sn65dsi86_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
sn65dsi86_out: endpoint {
remote-endpoint = <&mini_dp_con_in>;
};
};
};
};
};
&i2c6 {
pinctrl-0 = <&i2c6_pins>;
pinctrl-names = "default";
status = "okay";
clock-frequency = <400000>;
};
&mmc0 {
pinctrl-0 = <&mmc_pins>;
pinctrl-1 = <&mmc_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;
no-sd;
no-sdio;
non-removable;
full-pwr-cycle-in-suspend;
status = "okay";
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
i2c0_pins: i2c0 {
groups = "i2c0";
function = "i2c0";
};
i2c1_pins: i2c1 {
groups = "i2c1";
function = "i2c1";
};
i2c6_pins: i2c6 {
groups = "i2c6";
function = "i2c6";
};
irq0_pins: irq0 {
groups = "intc_ex_irq0";
function = "intc_ex";
};
keys_pins: keys {
pins = "GP_6_18", "GP_6_19", "GP_6_20";
bias-pull-up;
};
mmc_pins: mmc {
groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
function = "mmc";
power-source = <1800>;
};
qspi0_pins: qspi0 {
groups = "qspi0_ctrl", "qspi0_data4";
function = "qspi0";
};
scif0_pins: scif0 {
groups = "scif0_data", "scif0_ctrl";
function = "scif0";
};
scif_clk_pins: scif_clk {
groups = "scif_clk";
function = "scif_clk";
};
};
&rpc {
pinctrl-0 = <&qspi0_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
compatible = "spansion,s25fs512s", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
spi-rx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot@0 {
reg = <0x0 0xcc0000>;
read-only;
};
user@cc0000 {
reg = <0xcc0000 0x3340000>;
};
};
};
};
&rwdt {
timeout-sec = <60>;
status = "okay";
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
bootph-all;
uart-has-rtscts;
status = "okay";
};
&scif_clk {
clock-frequency = <24000000>;
};