mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-01 06:39:05 +00:00
0d5da04d23
The RGMII interface is designed for speeds up to 1G. Phylink already imposes the design limits for MII interfaces, and additional specification is unnecessary. Therefore, we can remove this property without any effect. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/E1u3bkm-000Epw-QU@rmk-PC.armlinux.org.uk Signed-off-by: Bjorn Andersson <andersson@kernel.org>
655 lines
12 KiB
Plaintext
655 lines
12 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022, Linaro Limited
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
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#include "sa8540p.dtsi"
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#include "sa8540p-pmics.dtsi"
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/ {
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model = "Qualcomm SA8540P Ride";
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compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c12 = &i2c12;
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i2c15 = &i2c15;
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i2c18 = &i2c18;
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serial0 = &uart17;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&apps_rsc {
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regulators-0 {
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compatible = "qcom,pm8150-rpmh-regulators";
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qcom,pmic-id = "a";
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vreg_l3a: ldo3 {
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regulator-name = "vreg_l3a";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1208000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l5a: ldo5 {
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regulator-name = "vreg_l5a";
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regulator-min-microvolt = <912000>;
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regulator-max-microvolt = <912000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l7a: ldo7 {
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regulator-name = "vreg_l7a";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l11a: ldo11 {
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regulator-name = "vreg_l11a";
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regulator-min-microvolt = <880000>;
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regulator-max-microvolt = <880000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l13a: ldo13 {
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regulator-name = "vreg_l13a";
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regulator-min-microvolt = <3072000>;
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regulator-max-microvolt = <3072000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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};
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regulators-1 {
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compatible = "qcom,pm8150-rpmh-regulators";
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qcom,pmic-id = "c";
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vreg_l1c: ldo1 {
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regulator-name = "vreg_l1c";
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regulator-min-microvolt = <912000>;
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regulator-max-microvolt = <912000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l2c: ldo2 {
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regulator-name = "vreg_l2c";
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regulator-min-microvolt = <3072000>;
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regulator-max-microvolt = <3072000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l4c: ldo4 {
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regulator-name = "vreg_l4c";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1208000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l6c: ldo6 {
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regulator-name = "vreg_l6c";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
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RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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};
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vreg_l7c: ldo7 {
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regulator-name = "vreg_l7c";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l17c: ldo17 {
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regulator-name = "vreg_l17c";
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regulator-min-microvolt = <2504000>;
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regulator-max-microvolt = <2504000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
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RPMH_REGULATOR_MODE_HPM>;
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regulator-allow-set-load;
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};
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};
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regulators-2 {
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compatible = "qcom,pm8150-rpmh-regulators";
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qcom,pmic-id = "g";
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vreg_l3g: ldo3 {
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regulator-name = "vreg_l3g";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l7g: ldo7 {
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regulator-name = "vreg_l7g";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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vreg_l8g: ldo8 {
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regulator-name = "vreg_l8g";
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regulator-min-microvolt = <880000>;
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regulator-max-microvolt = <880000>;
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regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
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};
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};
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};
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ðernet0 {
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snps,mtl-rx-config = <ðernet0_mtl_rx_setup>;
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snps,mtl-tx-config = <ðernet0_mtl_tx_setup>;
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phy-handle = <&rgmii_phy>;
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phy-mode = "rgmii-txid";
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pinctrl-names = "default";
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pinctrl-0 = <ðernet0_default>;
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status = "okay";
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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/* Marvell 88EA1512 */
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rgmii_phy: phy@8 {
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compatible = "ethernet-phy-id0141.0dd4";
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reg = <0x8>;
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interrupts-extended = <&tlmm 127 IRQ_TYPE_EDGE_FALLING>;
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reset-gpios = <&pmm8540c_gpios 1 GPIO_ACTIVE_LOW>;
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reset-assert-us = <11000>;
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reset-deassert-us = <70000>;
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device_type = "ethernet-phy";
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/* Set to RGMII_SGMII mode and soft reset. Turn off auto-negotiation
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* from userspace to talk to the switch on the SGMII side of things
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*/
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marvell,reg-init =
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/* Set MODE[2:0] to RGMII_SGMII */
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<0x12 0x14 0xfff8 0x4>,
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/* Soft reset required after changing MODE[2:0] */
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<0x12 0x14 0x7fff 0x8000>;
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};
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};
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ethernet0_mtl_rx_setup: rx-queues-config {
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snps,rx-queues-to-use = <1>;
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snps,rx-sched-sp;
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queue0 {
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snps,dcb-algorithm;
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snps,map-to-dma-channel = <0x0>;
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snps,route-up;
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snps,priority = <0x1>;
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};
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queue1 {
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snps,dcb-algorithm;
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snps,map-to-dma-channel = <0x1>;
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snps,route-ptp;
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};
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queue2 {
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snps,avb-algorithm;
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snps,map-to-dma-channel = <0x2>;
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snps,route-avcp;
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};
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queue3 {
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snps,avb-algorithm;
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snps,map-to-dma-channel = <0x3>;
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snps,priority = <0xc>;
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};
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};
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ethernet0_mtl_tx_setup: tx-queues-config {
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snps,tx-queues-to-use = <1>;
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queue0 {
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snps,dcb-algorithm;
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};
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queue1 {
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snps,dcb-algorithm;
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};
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queue2 {
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snps,avb-algorithm;
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snps,send_slope = <0x1000>;
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snps,idle_slope = <0x1000>;
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snps,high_credit = <0x3e800>;
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snps,low_credit = <0xffc18000>;
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};
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queue3 {
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snps,avb-algorithm;
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snps,send_slope = <0x1000>;
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snps,idle_slope = <0x1000>;
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snps,high_credit = <0x3e800>;
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snps,low_credit = <0xffc18000>;
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};
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};
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};
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ðernet1 {
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snps,mtl-rx-config = <ðernet1_mtl_rx_setup>;
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snps,mtl-tx-config = <ðernet1_mtl_tx_setup>;
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phy-mode = "rgmii-txid";
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pinctrl-names = "default";
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pinctrl-0 = <ðernet1_default>;
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status = "okay";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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ethernet1_mtl_rx_setup: rx-queues-config {
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snps,rx-queues-to-use = <1>;
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snps,rx-sched-sp;
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queue0 {
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snps,dcb-algorithm;
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snps,map-to-dma-channel = <0x0>;
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snps,route-up;
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snps,priority = <0x1>;
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};
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queue1 {
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snps,dcb-algorithm;
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snps,map-to-dma-channel = <0x1>;
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snps,route-ptp;
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};
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queue2 {
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snps,avb-algorithm;
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snps,map-to-dma-channel = <0x2>;
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snps,route-avcp;
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};
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queue3 {
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snps,avb-algorithm;
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snps,map-to-dma-channel = <0x3>;
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snps,priority = <0xc>;
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};
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};
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ethernet1_mtl_tx_setup: tx-queues-config {
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snps,tx-queues-to-use = <1>;
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queue0 {
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snps,dcb-algorithm;
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};
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queue1 {
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snps,dcb-algorithm;
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};
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queue2 {
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snps,avb-algorithm;
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snps,send_slope = <0x1000>;
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snps,idle_slope = <0x1000>;
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snps,high_credit = <0x3e800>;
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snps,low_credit = <0xffc18000>;
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};
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queue3 {
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snps,avb-algorithm;
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snps,send_slope = <0x1000>;
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snps,idle_slope = <0x1000>;
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snps,high_credit = <0x3e800>;
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snps,low_credit = <0xffc18000>;
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};
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};
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_default>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_default>;
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status = "okay";
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};
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&i2c12 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c12_default>;
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status = "okay";
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};
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&i2c15 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c15_default>;
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status = "okay";
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};
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&i2c18 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c18_default>;
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status = "okay";
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};
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&pcie2a {
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ranges = <0x01000000 0x0 0x3c200000 0x0 0x3c200000 0x0 0x100000>,
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<0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>,
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<0x03000000 0x5 0x00000000 0x5 0x00000000 0x1 0x00000000>;
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perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
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wake-gpios = <&tlmm 145 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie2a_default>;
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status = "disabled";
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};
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&pcie2a_phy {
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vdda-phy-supply = <&vreg_l11a>;
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vdda-pll-supply = <&vreg_l3a>;
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status = "disabled";
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};
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&pcie3a {
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ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
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<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x20000000>,
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<0x03000000 0x6 0x00000000 0x6 0x00000000 0x2 0x00000000>;
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perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
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wake-gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie3a_default>;
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status = "okay";
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};
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&pcie3a_phy {
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vdda-phy-supply = <&vreg_l11a>;
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vdda-pll-supply = <&vreg_l3a>;
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status = "okay";
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};
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&pmm8540a_rtc {
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nvmem-cells = <&rtc_offset>;
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nvmem-cell-names = "offset";
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status = "okay";
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};
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&pmm8540c_sdam_2 {
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status = "okay";
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rtc_offset: rtc-offset@a0 {
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reg = <0xa0 0x4>;
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};
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};
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&qup0 {
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status = "okay";
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};
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&qup1 {
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status = "okay";
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};
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&qup2 {
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status = "okay";
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};
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&remoteproc_nsp0 {
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firmware-name = "qcom/sa8540p/cdsp0.mbn";
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status = "okay";
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};
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&remoteproc_nsp1 {
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firmware-name = "qcom/sa8540p/cdsp1.mbn";
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status = "okay";
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};
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&uart17 {
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compatible = "qcom,geni-debug-uart";
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status = "okay";
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};
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&ufs_mem_hc {
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reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
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vcc-supply = <&vreg_l17c>;
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vccq-supply = <&vreg_l6c>;
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status = "okay";
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};
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&ufs_mem_phy {
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vdda-phy-supply = <&vreg_l8g>;
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vdda-pll-supply = <&vreg_l3g>;
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status = "okay";
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};
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&usb_0 {
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status = "okay";
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};
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&usb_0_dwc3 {
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dr_mode = "peripheral";
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};
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&usb_0_hsphy {
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vdda-pll-supply = <&vreg_l5a>;
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vdda18-supply = <&vreg_l7a>;
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vdda33-supply = <&vreg_l13a>;
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status = "okay";
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};
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&usb_0_qmpphy {
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vdda-phy-supply = <&vreg_l3a>;
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vdda-pll-supply = <&vreg_l5a>;
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status = "okay";
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};
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&usb_2_hsphy0 {
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vdda-pll-supply = <&vreg_l5a>;
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vdda18-supply = <&vreg_l7g>;
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vdda33-supply = <&vreg_l13a>;
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status = "okay";
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};
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&usb_2_qmpphy0 {
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vdda-phy-supply = <&vreg_l3a>;
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vdda-pll-supply = <&vreg_l5a>;
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status = "okay";
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};
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&xo_board_clk {
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clock-frequency = <38400000>;
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};
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/* PINCTRL */
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&tlmm {
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ethernet0_default: ethernet0-default-state {
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mdc-pins {
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pins = "gpio175";
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function = "rgmii_0";
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drive-strength = <16>;
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bias-pull-up;
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};
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mdio-pins {
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pins = "gpio176";
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function = "rgmii_0";
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drive-strength = <16>;
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bias-pull-up;
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};
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rgmii-tx-pins {
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pins = "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188";
|
|
function = "rgmii_0";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
rgmii-rx-pins {
|
|
pins = "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182";
|
|
function = "rgmii_0";
|
|
drive-strength = <16>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
ethernet1_default: ethernet1-default-state {
|
|
mdc-pins {
|
|
pins = "gpio97";
|
|
function = "rgmii_1";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
mdio-pins {
|
|
pins = "gpio98";
|
|
function = "rgmii_1";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
rgmii-tx-pins {
|
|
pins = "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110";
|
|
function = "rgmii_1";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
rgmii-rx-pins {
|
|
pins = "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104";
|
|
function = "rgmii_1";
|
|
drive-strength = <16>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
i2c0_default: i2c0-default-state {
|
|
/* To USB7002T-I/KDXVA0 USB hub (SIP1 only) */
|
|
pins = "gpio135", "gpio136";
|
|
function = "qup0";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
i2c1_default: i2c1-default-state {
|
|
/* To PM40028B-F3EI PCIe switch */
|
|
pins = "gpio158", "gpio159";
|
|
function = "qup1";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
i2c12_default: i2c12-default-state {
|
|
/* To Maxim max20411 */
|
|
pins = "gpio0", "gpio1";
|
|
function = "qup12";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
i2c15_default: i2c15-default-state {
|
|
/* To display connector (SIP1 only) */
|
|
pins = "gpio36", "gpio37";
|
|
function = "qup15";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
i2c18_default: i2c18-default-state {
|
|
/* To ASM330LHH IMU (SIP1 only) */
|
|
pins = "gpio66", "gpio67";
|
|
function = "qup18";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
pcie2a_default: pcie2a-default-state {
|
|
perst-pins {
|
|
pins = "gpio143";
|
|
function = "gpio";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
|
|
clkreq-pins {
|
|
pins = "gpio142";
|
|
function = "pcie2a_clkreq";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
wake-pins {
|
|
pins = "gpio145";
|
|
function = "gpio";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
pcie3a_default: pcie3a-default-state {
|
|
perst-pins {
|
|
pins = "gpio151";
|
|
function = "gpio";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
|
|
clkreq-pins {
|
|
pins = "gpio150";
|
|
function = "pcie3a_clkreq";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
|
|
wake-pins {
|
|
pins = "gpio56";
|
|
function = "gpio";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|