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e85cbb34f3
SA8540P-ride is one of the Qualcomm platforms that does not have access
to UEFI runtime services and on which the RTC registers are read-only,
as described in:
https://lore.kernel.org/all/20230202155448.6715-1-johan+linaro@kernel.org/
Reserve four bytes in one of the PMIC registers to hold the RTC offset
the same way as it was done for sc8280xp-crd which has similar
limitations:
commit e67b45582c ("arm64: dts: qcom: sc8280xp-crd: enable rtc")
On SA8540P-ride, the register bank SDAM6 of the first PMIC is not
writable. Following recommendations provided during the review, use
SDAM2 from the second PMIC at offset 0xa0 instead.
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Eric Chanudet <echanude@redhat.com>
Link: https://lore.kernel.org/r/20230809203506.1833205-1-echanude@redhat.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
96 lines
2.1 KiB
Plaintext
96 lines
2.1 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022, Linaro Limited
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/spmi/spmi.h>
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&spmi_bus {
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pmm8540a: pmic@0 {
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compatible = "qcom,pm8150", "qcom,spmi-pmic";
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reg = <0x0 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pmm8540a_rtc: rtc@6000 {
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compatible = "qcom,pm8941-rtc";
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reg = <0x6000>, <0x6100>;
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reg-names = "rtc", "alarm";
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interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
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wakeup-source;
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};
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pmm8540a_gpios: gpio@c000 {
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compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
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reg = <0xc000>;
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gpio-controller;
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gpio-ranges = <&pmm8540a_gpios 0 0 10>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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pmm8540c: pmic@4 {
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compatible = "qcom,pm8150", "qcom,spmi-pmic";
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reg = <0x4 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pmm8540c_sdam_2: nvram@b110 {
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compatible = "qcom,spmi-sdam";
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reg = <0xb110>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0xb110 0xb0>;
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status = "disabled";
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};
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pmm8540c_gpios: gpio@c000 {
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compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
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reg = <0xc000>;
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gpio-controller;
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gpio-ranges = <&pmm8540c_gpios 0 0 10>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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pmm8540e: pmic@8 {
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compatible = "qcom,pm8150", "qcom,spmi-pmic";
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reg = <0x8 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pmm8540e_gpios: gpio@c000 {
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compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
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reg = <0xc000>;
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gpio-controller;
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gpio-ranges = <&pmm8540e_gpios 0 0 10>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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pmm8540g: pmic@c {
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compatible = "qcom,pm8150", "qcom,spmi-pmic";
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reg = <0xc SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pmm8540g_gpios: gpio@c000 {
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compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
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reg = <0xc000>;
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gpio-controller;
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gpio-ranges = <&pmm8540g_gpios 0 0 10>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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};
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