linux-loongson/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
Chukun Pan 0c4c0f14b7 arm64: dts: qcom: ipq6018: move mp5496 regulator out of soc dtsi
Some IPQ60xx SoCs don't come with the mp5496 pmic chip. The mp5496
pmic was never part of the IPQ60xx SoC, it's optional, so we moved
it out of the soc dtsi.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250210070122.208842-4-amadeus@jmu.edu.cn
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-02-23 22:48:33 -06:00

89 lines
1.4 KiB
Plaintext

// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* IPQ6018 CP01 board device tree source
*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*/
/dts-v1/;
#include "ipq6018-mp5496.dtsi"
/ {
model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1";
compatible = "qcom,ipq6018-cp01", "qcom,ipq6018";
aliases {
serial0 = &blsp1_uart3;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&blsp1_uart3 {
pinctrl-0 = <&serial_3_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_i2c3 {
pinctrl-0 = <&i2c_1_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "micron,n25q128a11", "jedec,spi-nor";
spi-max-frequency = <50000000>;
};
};
&tlmm {
i2c_1_pins: i2c-1-state {
pins = "gpio42", "gpio43";
function = "blsp2_i2c";
drive-strength = <8>;
};
spi_0_pins: spi-0-state {
pins = "gpio38", "gpio39", "gpio40", "gpio41";
function = "blsp0_spi";
drive-strength = <8>;
bias-pull-down;
};
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
status = "okay";
nand@0 {
reg = <0>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
};
};
&qusb_phy_1 {
status = "okay";
};
&usb2 {
status = "okay";
};