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Add support for CN9130 and CN9131 COM Express Type 7 CPU module boards by Marvell. Define these COM Express CPU modules as dtsi and provide a dtsi file for a carrier board (Marvell AC5X RD COM Express type 7 carrier board). This Carrier board only utilizes the PCIe link, hence no special device / driver support is provided by this dtsi file. Finally, provide a dts file for the com express carrier and CPU module combination. These COM Express boards differ from the existing CN913x DB boards by the type of ethernet connection (RGMII), the type of voltage regulators (not i2c expander based) and the USB phy (not UTMI based). Note - PHY + RGMII connector is OOB on CPU module. CN9131 COM Express board is basically CN9130 COM Express board with an additional CP115 I/O co-processor, which in this case provides an additional USB host controller on the board. Signed-off-by: Elad Nachman <enachman@marvell.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
109 lines
1.7 KiB
Plaintext
109 lines
1.7 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2023 Marvell International Ltd.
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*
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* Device tree for the CN9131-DB Com Express CPU module board.
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*/
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#include "cn9131-db.dtsi"
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/ {
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model = "Marvell Armada CN9131-DB COM EXPRESS type 7 CPU module board";
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compatible = "marvell,cn9131-cpu-module", "marvell,cn9131", "marvell,cn9130",
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"marvell,armada-ap807-quad", "marvell,armada-ap807";
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};
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&ap0_reg_sd_vccq {
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regulator-max-microvolt = <1800000>;
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states = <1800000 0x1 1800000 0x0>;
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/delete-property/ gpios;
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};
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&cp0_reg_usb3_vbus0 {
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/delete-property/ gpio;
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};
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&cp0_reg_usb3_vbus1 {
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/delete-property/ gpio;
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};
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&cp1_reg_usb3_vbus0 {
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/delete-property/ gpio;
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};
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&cp0_reg_sd_vcc {
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status = "disabled";
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};
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&cp0_reg_sd_vccq {
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status = "disabled";
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};
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&cp0_sdhci0 {
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status = "disabled";
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};
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&cp0_eth0 {
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status = "disabled";
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};
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&cp0_eth1 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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&cp0_eth2 {
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status = "disabled";
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};
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&cp0_mdio {
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status = "okay";
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pinctrl-0 = <&cp0_ge_mdio_pins>;
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phy0: ethernet-phy@0 {
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status = "okay";
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};
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};
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&cp0_syscon0 {
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cp0_pinctrl: pinctrl {
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compatible = "marvell,cp115-standalone-pinctrl";
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cp0_ge_mdio_pins: ge-mdio-pins {
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marvell,pins = "mpp40", "mpp41";
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marvell,function = "ge";
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};
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};
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};
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&cp0_sdhci0 {
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status = "disabled";
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};
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&cp0_spi1 {
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status = "okay";
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};
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&cp0_usb3_0 {
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status = "okay";
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usb-phy = <&cp0_usb3_0_phy0>;
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phy-names = "usb";
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/delete-property/ phys;
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};
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&cp0_usb3_1 {
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status = "okay";
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usb-phy = <&cp0_usb3_0_phy1>;
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phy-names = "usb";
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/delete-property/ phys;
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};
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&cp1_usb3_1 {
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status = "okay";
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usb-phy = <&cp1_usb3_0_phy0>;
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/* Generic PHY, providing serdes lanes */
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phys = <&cp1_comphy3 1>;
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phy-names = "usb";
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};
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