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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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859f3fac81
The Marvell .dtsi files define model and compatible properties which aren't complete. They are missing board compatible for example. This is mostly harmless as the properties will typically get overwritten. However, with these there will not be any warning should a board .dts forget to define its compatible and model. armada-371x.dtsi is not used anywhere, so it can be removed entirely since there is nothing left in it. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
158 lines
3.2 KiB
Plaintext
158 lines
3.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
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*
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*/
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#include <dt-bindings/gpio/gpio.h>
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/ {
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aliases {
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ethernet0 = &cp0_eth0;
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ethernet1 = &cp0_eth1;
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ethernet2 = &cp0_eth2;
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i2c0 = &cp0_i2c0;
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mmc0 = &ap_sdhci0;
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rtc0 = &cp0_rtc;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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v_1_8: regulator-1-8 {
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compatible = "regulator-fixed";
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regulator-name = "1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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/* requires assembly of R9307 */
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vhv: regulator-vhv-1-8 {
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compatible = "regulator-fixed";
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regulator-name = "vhv-1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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pinctrl-0 = <&cp0_reg_vhv_pins>;
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pinctrl-names = "default";
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gpios = <&cp0_gpio2 9 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&ap_pinctrl {
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ap_mmc0_pins: ap-mmc0-pins {
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marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", "mpp4", "mpp5",
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"mpp6", "mpp7", "mpp8", "mpp9", "mpp10", "mpp12";
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marvell,function = "sdio";
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/*
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* mpp12 is emmc reset, function should be sdio (hw_rst),
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* but pinctrl-mvebu does not support this.
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*
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* From pinctrl-mvebu.h:
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* "The name will be used to switch to this setting in DT description, e.g.
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* marvell,function = "uart2". subname is only for debugging purposes."
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*/
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};
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};
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&ap_sdhci0 {
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bus-width = <8>;
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pinctrl-0 = <&ap_mmc0_pins>;
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pinctrl-names = "default";
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vqmmc-supply = <&v_1_8>;
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status = "okay";
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};
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&cp0_ethernet {
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status = "okay";
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};
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/* for assembly with phy */
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&cp0_eth2 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_eth2_pins>;
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phy-mode = "rgmii-id";
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phy = <&cp0_eth2_phy>;
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status = "okay";
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};
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&cp0_i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c0_pins>;
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clock-frequency = <100000>;
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status = "okay";
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som_eeprom: eeprom@53 {
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compatible = "atmel,24c02";
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reg = <0x53>;
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pagesize = <8>;
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};
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};
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&cp0_mdio {
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pinctrl-0 = <&cp0_mdio_pins>;
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status = "okay";
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/* assembly option */
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cp0_eth2_phy: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&cp0_spi1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_spi1_pins>;
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/* max speed limited by a mux */
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spi-max-frequency = <1800000000>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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/* read command supports max. 50MHz */
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spi-max-frequency = <50000000>;
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};
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};
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&cp0_syscon0 {
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cp0_pinctrl: pinctrl {
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compatible = "marvell,cp115-standalone-pinctrl";
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cp0_eth2_pins: cp0-ge2-rgmii-pins {
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marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47",
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"mpp48", "mpp49", "mpp50", "mpp51",
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"mpp52", "mpp53", "mpp54", "mpp55";
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/* docs call it "ge2", but cp110-pinctrl "ge1" */
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marvell,function = "ge1";
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};
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cp0_i2c0_pins: cp0-i2c0-pins {
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marvell,pins = "mpp37", "mpp38";
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marvell,function = "i2c0";
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};
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cp0_mdio_pins: cp0-mdio-pins {
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marvell,pins = "mpp0", "mpp1";
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marvell,function = "ge";
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};
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cp0_spi1_pins: cp0-spi1-pins {
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marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
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marvell,function = "spi1";
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};
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cp0_reg_vhv_pins: cp0-reg-vhv-pins {
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marvell,pins = "mpp41";
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marvell,function = "gpio";
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};
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};
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};
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/* AP default console */
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&uart0 {
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pinctrl-0 = <&uart0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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