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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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98be2d60fd
gs101 (Google Pixel 6 and Pixel 6 Pro) supports cold- and warm-reboot. Cold-reset is useful because it is more secure, e.g. wiping all RAM contents, while the warm-reboot allows RAM contents to be retained across the reboot, e.g. to collect potential crash information. Add the required DT changes to switch to the gs101-specific reboot method, which knows how to issue either reset as requested by the OS. The PMIC plays a role in this as well, so mark it as 'system-power-controller', which in this case ensures that the device will wake up again after a cold-reboot, ensuring the full power-cycle is successful. Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20250627-gs101-reboot3-v1-3-c3ae49657b1f@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
391 lines
8.2 KiB
Plaintext
391 lines
8.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Device Tree nodes common for all GS101-based Pixel
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*
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* Copyright 2021-2023 Google LLC
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* Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/usb/pd.h>
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#include "gs101-pinctrl.h"
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#include "gs101.dtsi"
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/ {
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aliases {
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serial0 = &serial_0;
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};
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chosen {
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/* Bootloader expects bootargs specified otherwise it crashes */
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bootargs = "";
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stdout-path = &serial_0;
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/* Use display framebuffer as setup by bootloader */
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framebuffer0: framebuffer-0 {
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compatible = "simple-framebuffer";
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memory-region = <&cont_splash_mem>;
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/* format properties to be added by actual board */
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status = "disabled";
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&key_voldown>, <&key_volup>, <&key_power>;
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pinctrl-names = "default";
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button-vol-down {
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label = "KEY_VOLUMEDOWN";
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linux,code = <KEY_VOLUMEDOWN>;
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gpios = <&gpa7 3 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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button-vol-up {
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label = "KEY_VOLUMEUP";
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linux,code = <KEY_VOLUMEUP>;
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gpios = <&gpa8 1 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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button-power {
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label = "KEY_POWER";
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linux,code = <KEY_POWER>;
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gpios = <&gpa10 1 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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};
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reboot-mode {
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compatible = "nvmem-reboot-mode";
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nvmem-cells = <&nvmem_reboot_mode>;
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nvmem-cell-names = "reboot-mode";
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mode-bootloader = <0x800000fc>;
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mode-charge = <0x8000000a>;
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mode-dm-verity-device-corrupted = <0x80000050>;
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mode-fastboot = <0x800000fa>;
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mode-reboot-ab-update = <0x80000052>;
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mode-recovery = <0x800000ff>;
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mode-rescue = <0x800000f9>;
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mode-shutdown-thermal = <0x80000051>;
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mode-shutdown-thermal-battery = <0x80000051>;
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};
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/* TODO: Remove this once PMIC is implemented */
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reg_placeholder: regulator-0 {
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compatible = "regulator-fixed";
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regulator-name = "placeholder_reg";
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};
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/* TODO: Remove this once S2MPG11 slave PMIC is implemented */
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ufs_0_fixed_vcc_reg: regulator-1 {
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compatible = "regulator-fixed";
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regulator-name = "ufs-vcc";
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gpio = <&gpp0 1 GPIO_ACTIVE_HIGH>;
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regulator-boot-on;
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enable-active-high;
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};
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reserved-memory {
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cont_splash_mem: splash@fac00000 {
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/* size to be updated by actual board */
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reg = <0x0 0xfac00000 0x0>;
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no-map;
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status = "disabled";
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};
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};
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};
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&acpm_ipc {
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pmic {
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compatible = "samsung,s2mpg10-pmic";
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interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int>;
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system-power-controller;
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wakeup-source;
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regulators {
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};
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};
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};
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&ext_24_5m {
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clock-frequency = <24576000>;
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};
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&ext_200m {
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clock-frequency = <200000000>;
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};
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&hsi2c_8 {
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status = "okay";
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eeprom: eeprom@50 {
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compatible = "atmel,24c08";
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reg = <0x50>;
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};
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};
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&hsi2c_12 {
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status = "okay";
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/* TODO: add the devices once drivers exist */
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usb-typec@25 {
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compatible = "maxim,max77759-tcpci", "maxim,max33359";
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reg = <0x25>;
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interrupts-extended = <&gpa8 2 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-0 = <&typec_int>;
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pinctrl-names = "default";
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connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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data-role = "dual";
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power-role = "dual";
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self-powered;
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try-power-role = "sink";
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op-sink-microwatt = <2600000>;
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slow-charger-loop;
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/*
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* max77759 operating in reverse boost mode (0xA) can
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* source up to 1.5A while extboost can only do ~1A.
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* Since extboost is the primary path, advertise 900mA.
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*/
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source-pdos = <PDO_FIXED(5000, 900,
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(PDO_FIXED_SUSPEND
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| PDO_FIXED_USB_COMM
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| PDO_FIXED_DATA_SWAP
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| PDO_FIXED_DUAL_ROLE))>;
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sink-pdos = <PDO_FIXED(5000, 3000,
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(PDO_FIXED_DATA_SWAP
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| PDO_FIXED_USB_COMM
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| PDO_FIXED_HIGHER_CAP
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| PDO_FIXED_DUAL_ROLE))
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PDO_FIXED(9000, 2200, 0)
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PDO_PPS_APDO(5000, 11000, 3000)>;
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sink-vdos = <VDO_IDH(1, 1, IDH_PTYPE_PERIPH, 0,
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IDH_PTYPE_DFP_HOST, 2, 0x18d1)
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VDO_CERT(0x0)
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VDO_PRODUCT(0x4ee1, 0x0)
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VDO_UFP(UFP_VDO_VER1_2,
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(DEV_USB2_CAPABLE
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| DEV_USB3_CAPABLE),
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UFP_RECEPTACLE, 0,
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AMA_VCONN_NOT_REQ, 0,
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UFP_ALTMODE_NOT_SUPP,
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UFP_USB32_GEN1)
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/* padding */ 0
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VDO_DFP(DFP_VDO_VER1_1,
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(HOST_USB2_CAPABLE
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| HOST_USB3_CAPABLE),
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DFP_RECEPTACLE, 0)>;
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sink-vdos-v1 = <VDO_IDH(1, 1, IDH_PTYPE_PERIPH, 0,
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0, 0, 0x18d1)
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VDO_CERT(0x0)
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VDO_PRODUCT(0x4ee1, 0x0)>;
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/*
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* Until bootloader is updated to set those two when
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* console is enabled, we disable PD here.
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*/
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pd-disable;
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typec-power-opmode = "default";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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usbc0_orien_sw: endpoint {
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remote-endpoint = <&usbdrd31_phy_orien_switch>;
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};
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};
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port@1 {
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reg = <1>;
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usbc0_role_sw: endpoint {
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remote-endpoint = <&usbdrd31_dwc3_role_switch>;
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};
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};
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};
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};
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};
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pmic@66 {
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compatible = "maxim,max77759";
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reg = <0x66>;
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pinctrl-0 = <&if_pmic_int>;
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pinctrl-names = "default";
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interrupts-extended = <&gpa8 3 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio {
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compatible = "maxim,max77759-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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/*
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* "Human-readable name [SIGNAL_LABEL]" where the
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* latter comes from the schematic
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*/
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gpio-line-names = "OTG boost [OTG_BOOST_EN]",
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"max20339 IRQ [MW_OVP_INT_L]";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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nvmem-0 {
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compatible = "maxim,max77759-nvmem";
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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nvmem_reboot_mode: reboot-mode@0 {
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reg = <0x0 0x4>;
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};
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boot-reason@4 {
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reg = <0x4 0x4>;
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};
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shutdown-user-flag@8 {
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reg = <0x8 0x1>;
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};
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rsoc@a {
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reg = <0xa 0x2>;
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};
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};
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};
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};
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};
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&pinctrl_far_alive {
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key_voldown: key-voldown-pins {
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samsung,pins = "gpa7-3";
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samsung,pin-function = <GS101_PIN_FUNC_EINT>;
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samsung,pin-pud = <GS101_PIN_PULL_NONE>;
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samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
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};
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key_volup: key-volup-pins {
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samsung,pins = "gpa8-1";
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samsung,pin-function = <GS101_PIN_FUNC_EINT>;
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samsung,pin-pud = <GS101_PIN_PULL_NONE>;
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samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
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};
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typec_int: typec-int-pins {
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samsung,pins = "gpa8-2";
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samsung,pin-function = <GS101_PIN_FUNC_EINT>;
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samsung,pin-pud = <GS101_PIN_PULL_UP>;
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samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
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};
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if_pmic_int: if-pmic-int-pins {
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samsung,pins = "gpa8-3";
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samsung,pin-function = <GS101_PIN_FUNC_EINT>;
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samsung,pin-pud = <GS101_PIN_PULL_UP>;
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samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
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};
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};
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&pinctrl_gpio_alive {
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pmic_int: pmic-int-pins {
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samsung,pins = "gpa0-6";
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samsung,pin-function = <GS101_PIN_FUNC_EINT>;
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samsung,pin-pud = <GS101_PIN_PULL_NONE>;
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};
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key_power: key-power-pins {
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samsung,pins = "gpa10-1";
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samsung,pin-function = <GS101_PIN_FUNC_EINT>;
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samsung,pin-pud = <GS101_PIN_PULL_NONE>;
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samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
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};
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};
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&serial_0 {
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status = "okay";
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};
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&ufs_0 {
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status = "okay";
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vcc-supply = <&ufs_0_fixed_vcc_reg>;
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};
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&ufs_0_phy {
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status = "okay";
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};
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&usbdrd31 {
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vdd10-supply = <®_placeholder>;
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vdd33-supply = <®_placeholder>;
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status = "okay";
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};
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&usbdrd31_dwc3 {
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dr_mode = "otg";
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usb-role-switch;
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role-switch-default-mode = "peripheral";
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maximum-speed = "super-speed-plus";
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status = "okay";
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port {
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usbdrd31_dwc3_role_switch: endpoint {
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remote-endpoint = <&usbc0_role_sw>;
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};
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};
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};
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&usbdrd31_phy {
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orientation-switch;
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/* TODO: Update these once PMIC is implemented */
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pll-supply = <®_placeholder>;
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dvdd-usb20-supply = <®_placeholder>;
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vddh-usb20-supply = <®_placeholder>;
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vdd33-usb20-supply = <®_placeholder>;
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vdda-usbdp-supply = <®_placeholder>;
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vddh-usbdp-supply = <®_placeholder>;
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status = "okay";
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port {
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usbdrd31_phy_orien_switch: endpoint {
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remote-endpoint = <&usbc0_orien_sw>;
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};
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};
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};
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&usi_uart {
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samsung,clkreq-on; /* needed for UART mode */
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status = "okay";
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};
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&usi8 {
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samsung,mode = <USI_MODE_I2C>;
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status = "okay";
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};
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&usi12 {
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samsung,mode = <USI_MODE_I2C>;
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status = "okay";
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};
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&watchdog_cl0 {
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timeout-sec = <30>;
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status = "okay";
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};
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