mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-02 08:12:59 +00:00
bbdccf0f4e
All the BCMBCA SoCs share a set of peripherals at 0xff800000, albeit at slightly varying memory locations on the bus and with varying IRQ assignments. ARM64 SoCs have additional peripherals at 0xff858000, we extend the peripheral bus range to 0x400000 to cover this area. Add the watchdog, remaining GPIO blocks, RNG, and DMA blocks for the BCM4908 based on the vendor files 4908_map_part.h and 4908_intr.h from the "bcmopen-consumer" code drop. This SoC has up to 320 possible GPIOs due to having 10 registers with 32 GPIOs in each available. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-9-86f97ab4326f@linaro.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
758 lines
15 KiB
Plaintext
758 lines
15 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/soc/bcm-pmb.h>
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/dts-v1/;
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/ {
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "brcm,brahma-b53";
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reg = <0x0>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0xff8>;
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next-level-cache = <&l2>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "brcm,brahma-b53";
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reg = <0x1>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0xff8>;
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next-level-cache = <&l2>;
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "brcm,brahma-b53";
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reg = <0x2>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0xff8>;
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next-level-cache = <&l2>;
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "brcm,brahma-b53";
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reg = <0x3>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0xff8>;
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next-level-cache = <&l2>;
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};
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l2: l2-cache0 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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cfe-stub@0 {
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reg = <0x0 0x0 0x0 0x1000>;
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};
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};
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axi@81000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00 0x00 0x81000000 0x4000>;
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gic: interrupt-controller@1000 {
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compatible = "arm,gic-400";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x1000 0x1000>,
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<0x2000 0x2000>;
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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pmu {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
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};
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clocks {
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periph_clk: periph_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "periph";
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};
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hsspi_pll: hsspi-pll {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <400000000>;
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00 0x00 0x80000000 0x281000>;
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enet: ethernet@2000 {
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compatible = "brcm,bcm4908-enet";
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reg = <0x2000 0x1000>;
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "rx", "tx";
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};
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usb_phy: usb-phy@c200 {
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compatible = "brcm,bcm4908-usb-phy";
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reg = <0xc200 0x100>;
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reg-names = "ctrl";
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power-domains = <&pmb BCM_PMB_HOST_USB>;
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dr_mode = "host";
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brcm,has-xhci;
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brcm,has-eohci;
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#phy-cells = <1>;
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status = "disabled";
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};
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ehci: usb@c300 {
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compatible = "generic-ehci";
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reg = <0xc300 0x100>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usb_phy PHY_TYPE_USB2>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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ehci_port1: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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ehci_port2: port@2 {
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reg = <2>;
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#trigger-source-cells = <0>;
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};
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};
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ohci: usb@c400 {
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compatible = "generic-ohci";
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reg = <0xc400 0x100>;
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interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usb_phy PHY_TYPE_USB2>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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ohci_port1: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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ohci_port2: port@2 {
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reg = <2>;
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#trigger-source-cells = <0>;
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};
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};
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xhci: usb@d000 {
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compatible = "generic-xhci";
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reg = <0xd000 0x8c8>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usb_phy PHY_TYPE_USB3>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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xhci_port1: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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xhci_port2: port@2 {
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reg = <2>;
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#trigger-source-cells = <0>;
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};
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};
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bus@80000 {
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compatible = "simple-bus";
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#size-cells = <1>;
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#address-cells = <1>;
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ranges = <0 0x80000 0x50000>;
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ethernet-switch@0 {
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compatible = "brcm,bcm4908-switch";
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reg = <0x0 0x40000>,
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<0x40000 0x110>,
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<0x40340 0x30>,
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<0x40380 0x30>,
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<0x40600 0x34>,
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<0x40800 0x208>;
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reg-names = "core", "reg", "intrl2_0",
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"intrl2_1", "fcb", "acb";
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interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
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brcm,num-gphy = <5>;
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brcm,num-rgmii-ports = <2>;
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ports: ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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phy-mode = "internal";
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phy-handle = <&phy8>;
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};
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port@1 {
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reg = <1>;
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phy-mode = "internal";
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phy-handle = <&phy9>;
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};
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port@2 {
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reg = <2>;
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phy-mode = "internal";
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phy-handle = <&phy10>;
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};
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port@3 {
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reg = <3>;
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phy-mode = "internal";
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phy-handle = <&phy11>;
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};
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port@8 {
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reg = <8>;
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phy-mode = "internal";
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ethernet = <&enet>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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mdio: mdio@405c0 {
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compatible = "brcm,unimac-mdio";
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reg = <0x405c0 0x8>;
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reg-names = "mdio";
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#size-cells = <0>;
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#address-cells = <1>;
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phy8: ethernet-phy@8 {
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reg = <8>;
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};
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phy9: ethernet-phy@9 {
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reg = <9>;
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};
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phy10: ethernet-phy@a {
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reg = <10>;
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};
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phy11: ethernet-phy@b {
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reg = <11>;
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};
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phy12: ethernet-phy@c {
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reg = <12>;
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};
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};
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};
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procmon: bus@280000 {
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compatible = "simple-bus";
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reg = <0x280000 0x1000>;
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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pmb: power-controller@2800c0 {
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compatible = "brcm,bcm4908-pmb";
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reg = <0x2800c0 0x40>;
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#power-domain-cells = <1>;
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};
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};
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};
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/* PERF Peripherals */
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bus@ff800000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00 0x00 0xff800000 0x400000>;
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twd: timer-mfd@400 {
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compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
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reg = <0x400 0x4c>;
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ranges = <0x0 0x400 0x4c>;
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#address-cells = <1>;
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#size-cells = <1>;
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timer@0 {
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compatible = "brcm,bcm63138-timer";
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reg = <0x0 0x28>;
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};
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watchdog@28 {
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compatible = "brcm,bcm6345-wdt";
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reg = <0x28 0x8>;
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};
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};
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/* GPIOs 0 .. 31 */
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gpio0: gpio@500 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x500 0x04>, <0x528 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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};
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/* GPIOs 32 .. 63 */
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gpio1: gpio@504 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x504 0x04>, <0x52c 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* GPIOs 64 .. 95 */
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gpio2: gpio@508 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x508 0x04>, <0x530 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* GPIOs 96 .. 127 */
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gpio3: gpio@50c {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x50c 0x04>, <0x534 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* GPIOs 128 .. 159 */
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gpio4: gpio@510 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x510 0x04>, <0x538 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* GPIOs 160 .. 191 */
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gpio5: gpio@514 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x514 0x04>, <0x53c 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* GPIOs 192 .. 223 */
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gpio6: gpio@518 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x518 0x04>, <0x540 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* GPIOs 224 .. 255 */
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gpio7: gpio@51c {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x51c 0x04>, <0x544 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* GPIOs 256 .. 287 */
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gpio8: gpio@520 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x520 0x04>, <0x548 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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/* GPIOs 288 .. 319 */
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gpio9: gpio@524 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x524 0x04>, <0x54c 0x04>;
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reg-names = "dirout", "dat";
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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pinctrl@560 {
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compatible = "brcm,bcm4908-pinctrl";
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reg = <0x560 0x10>;
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pins_led_0_a: led_0-a-pins {
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function = "led_0";
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groups = "led_0_grp_a";
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};
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pins_led_1_a: led_1-a-pins {
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function = "led_1";
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groups = "led_1_grp_a";
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};
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pins_led_2_a: led_2-a-pins {
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function = "led_2";
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groups = "led_2_grp_a";
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};
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pins_led_3_a: led_3-a-pins {
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function = "led_3";
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groups = "led_3_grp_a";
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};
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pins_led_4_a: led_4-a-pins {
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function = "led_4";
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groups = "led_4_grp_a";
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};
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pins_led_5_a: led_5-a-pins {
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function = "led_5";
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groups = "led_5_grp_a";
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};
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pins_led_6_a: led_6-a-pins {
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function = "led_6";
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groups = "led_6_grp_a";
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};
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pins_led_7_a: led_7-a-pins {
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function = "led_7";
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groups = "led_7_grp_a";
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};
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pins_led_8_a: led_8-a-pins {
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function = "led_8";
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groups = "led_8_grp_a";
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};
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pins_led_9_a: led_9-a-pins {
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function = "led_9";
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groups = "led_9_grp_a";
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};
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pins_led_10_a: led_10-a-pins {
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function = "led_10";
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groups = "led_10_grp_a";
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};
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pins_led_11_a: led_11-a-pins {
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function = "led_11";
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groups = "led_11_grp_a";
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};
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pins_led_12_a: led_12-a-pins {
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function = "led_12";
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groups = "led_12_grp_a";
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};
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pins_led_13_a: led_13-a-pins {
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function = "led_13";
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groups = "led_13_grp_a";
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};
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pins_led_14_a: led_14-a-pins {
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function = "led_14";
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groups = "led_14_grp_a";
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};
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pins_led_15_a: led_15-a-pins {
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function = "led_15";
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groups = "led_15_grp_a";
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};
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|
|
pins_led_16_a: led_16-a-pins {
|
|
function = "led_16";
|
|
groups = "led_16_grp_a";
|
|
};
|
|
|
|
pins_led_17_a: led_17-a-pins {
|
|
function = "led_17";
|
|
groups = "led_17_grp_a";
|
|
};
|
|
|
|
pins_led_18_a: led_18-a-pins {
|
|
function = "led_18";
|
|
groups = "led_18_grp_a";
|
|
};
|
|
|
|
pins_led_19_a: led_19-a-pins {
|
|
function = "led_19";
|
|
groups = "led_19_grp_a";
|
|
};
|
|
|
|
pins_led_20_a: led_20-a-pins {
|
|
function = "led_20";
|
|
groups = "led_20_grp_a";
|
|
};
|
|
|
|
pins_led_21_a: led_21-a-pins {
|
|
function = "led_21";
|
|
groups = "led_21_grp_a";
|
|
};
|
|
|
|
pins_led_22_a: led_22-a-pins {
|
|
function = "led_22";
|
|
groups = "led_22_grp_a";
|
|
};
|
|
|
|
pins_led_23_a: led_23-a-pins {
|
|
function = "led_23";
|
|
groups = "led_23_grp_a";
|
|
};
|
|
|
|
pins_led_24_a: led_24-a-pins {
|
|
function = "led_24";
|
|
groups = "led_24_grp_a";
|
|
};
|
|
|
|
pins_led_25_a: led_25-a-pins {
|
|
function = "led_25";
|
|
groups = "led_25_grp_a";
|
|
};
|
|
|
|
pins_led_26_a: led_26-a-pins {
|
|
function = "led_26";
|
|
groups = "led_26_grp_a";
|
|
};
|
|
|
|
pins_led_27_a: led_27-a-pins {
|
|
function = "led_27";
|
|
groups = "led_27_grp_a";
|
|
};
|
|
|
|
pins_led_28_a: led_28-a-pins {
|
|
function = "led_28";
|
|
groups = "led_28_grp_a";
|
|
};
|
|
|
|
pins_led_29_a: led_29-a-pins {
|
|
function = "led_29";
|
|
groups = "led_29_grp_a";
|
|
};
|
|
|
|
pins_led_30_a: led_30-a-pins {
|
|
function = "led_30";
|
|
groups = "led_30_grp_a";
|
|
};
|
|
|
|
pins_led_31_a: led_31-a-pins {
|
|
function = "led_31";
|
|
groups = "led_31_grp_a";
|
|
};
|
|
|
|
pins_hs_uart: hs_uart-pins {
|
|
function = "hs_uart";
|
|
groups = "hs_uart_grp";
|
|
};
|
|
|
|
pins_i2c_a: i2c-a-pins {
|
|
function = "i2c";
|
|
groups = "i2c_grp_a";
|
|
};
|
|
|
|
pins_i2c_b: i2c-b-pins {
|
|
function = "i2c";
|
|
groups = "i2c_grp_b";
|
|
};
|
|
|
|
pins_i2s: i2s-pins {
|
|
function = "i2s";
|
|
groups = "i2s_grp";
|
|
};
|
|
|
|
pins_nand_ctrl: nand_ctrl-pins {
|
|
function = "nand_ctrl";
|
|
groups = "nand_ctrl_grp";
|
|
};
|
|
|
|
pins_nand_data: nand_data-pins {
|
|
function = "nand_data";
|
|
groups = "nand_data_grp";
|
|
};
|
|
|
|
pins_emmc_ctrl: emmc_ctrl-pins {
|
|
function = "emmc_ctrl";
|
|
groups = "emmc_ctrl_grp";
|
|
};
|
|
|
|
pins_usb0_pwr: usb0_pwr-pins {
|
|
function = "usb0_pwr";
|
|
groups = "usb0_pwr_grp";
|
|
};
|
|
|
|
pins_usb1_pwr: usb1_pwr-pins {
|
|
function = "usb1_pwr";
|
|
groups = "usb1_pwr_grp";
|
|
};
|
|
};
|
|
|
|
uart0: serial@640 {
|
|
compatible = "brcm,bcm6345-uart";
|
|
reg = <0x640 0x18>;
|
|
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&periph_clk>;
|
|
clock-names = "refclk";
|
|
status = "okay";
|
|
};
|
|
|
|
leds: leds@800 {
|
|
compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds";
|
|
reg = <0x800 0xdc>;
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
|
|
rng@b80 {
|
|
compatible = "brcm,iproc-rng200";
|
|
reg = <0xb80 0x28>;
|
|
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
hsspi: spi@1000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0";
|
|
reg = <0x1000 0x600>;
|
|
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&hsspi_pll &hsspi_pll>;
|
|
clock-names = "hsspi", "pll";
|
|
num-cs = <8>;
|
|
status = "disabled";
|
|
};
|
|
|
|
nand_controller: nand-controller@1800 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
|
|
reg = <0x1800 0x600>, <0x2000 0x10>;
|
|
reg-names = "nand", "nand-int-base";
|
|
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-names = "nand_ctlrdy";
|
|
brcm,wp-not-connected;
|
|
status = "disabled";
|
|
|
|
nandcs: nand@0 {
|
|
compatible = "brcm,nandcs";
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
i2c@2100 {
|
|
compatible = "brcm,brcmper-i2c";
|
|
reg = <0x2100 0x58>;
|
|
clock-frequency = <97500>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pins_i2c_a>;
|
|
status = "disabled";
|
|
};
|
|
|
|
misc@2600 {
|
|
compatible = "brcm,misc", "simple-mfd";
|
|
reg = <0x2600 0xe4>;
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges = <0x00 0x2600 0xe4>;
|
|
|
|
reset-controller@2644 {
|
|
compatible = "brcm,bcm4908-misc-pcie-reset";
|
|
reg = <0x44 0x04>;
|
|
#reset-cells = <1>;
|
|
};
|
|
};
|
|
|
|
pl081_dma: dma-controller@59000 {
|
|
compatible = "arm,pl081", "arm,primecell";
|
|
// The magic B105F00D info is missing
|
|
arm,primecell-periphid = <0x00041081>;
|
|
reg = <0x59000 0x1000>;
|
|
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
|
|
memcpy-burst-size = <256>;
|
|
memcpy-bus-width = <32>;
|
|
clocks = <&periph_clk>;
|
|
clock-names = "apb_pclk";
|
|
#dma-cells = <2>;
|
|
};
|
|
};
|
|
|
|
reboot {
|
|
compatible = "syscon-reboot";
|
|
regmap = <&twd>;
|
|
offset = <0x34>;
|
|
mask = <1>;
|
|
};
|
|
};
|