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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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44b96e7a38
Add support for the Variscite Concerto Carrier Board with: - LVDS interface for the VLCD-CAP-GLD-LVDS 7" LCD 800 x 480 touch display (not configured) - USB Host + USB OTG Connector - 10/100 Mbps Ethernet - miniPCI-Express slot - SD Card connector - Audio Headphone/Line In jack connectors - S-ATA - On-board DMIC Product Page: https://www.variscite.com/product/single-board-computers/concerto-board This file is based on the one provided by Variscite on their own kernel, but adapted for mainline. Signed-off-by: Antonin Godard <antonin.godard@bootlin.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
321 lines
6.6 KiB
Plaintext
321 lines
6.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Support for Variscite MX6 Concerto Carrier board with the VAR-SOM-MX6UL
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* Variscite SoM mounted on it
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*
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* Copyright 2019 Variscite Ltd.
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* Copyright 2025 Bootlin
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*/
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#include "imx6ul-var-som.dtsi"
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#include <dt-bindings/leds/common.h>
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/ {
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model = "Variscite VAR-SOM-MX6UL Concerto Board";
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compatible = "variscite,mx6ulconcerto", "variscite,var-som-imx6ul", "fsl,imx6ul";
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chosen {
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stdout-path = &uart1;
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_key_back>, <&pinctrl_gpio_key_wakeup>;
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key-back {
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gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_BACK>;
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};
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key-wakeup {
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gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WAKEUP>;
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wakeup-source;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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led-0 {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_GREEN>;
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label = "gpled2";
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gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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status = "okay";
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};
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&fec1 {
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status = "disabled";
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};
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&fec2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet2>, <&pinctrl_enet2_gpio>, <&pinctrl_enet2_mdio>;
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phy-mode = "rmii";
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phy-handle = <ðphy1>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1: ethernet-phy@3 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <3>;
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clocks = <&rmii_ref_clk>;
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clock-names = "rmii-ref";
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reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
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reset-assert-us = <100000>;
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micrel,led-mode = <0>;
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micrel,rmii-reference-clock-select-25-mhz = <1>;
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};
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};
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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rtc@68 {
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/*
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* To actually use this interrupt
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* connect pins J14.8 & J14.10 on the Concerto-Board.
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*/
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compatible = "dallas,ds1337";
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reg = <0x68>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rtc>;
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interrupt-parent = <&gpio1>;
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interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
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};
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};
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&iomuxc {
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pinctrl_enet2: enet2grp {
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fsl,pins = <
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MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
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MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
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MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
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MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
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MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
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MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
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MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
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MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
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>;
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};
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pinctrl_enet2_gpio: enet2-gpiogrp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* fec2 reset */
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>;
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};
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pinctrl_enet2_mdio: enet2-mdiogrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
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MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
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MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
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>;
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};
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pinctrl_gpio_key_back: gpio-key-backgrp {
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fsl,pins = <
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MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x17059
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>;
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};
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pinctrl_gpio_leds: gpio-ledsgrp {
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fsl,pins = <
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MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x1b0b0 /* GPLED2 */
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>;
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};
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pinctrl_gpio_key_wakeup: gpio-keys-wakeupgrp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x17059
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6UL_PAD_CSI_PIXCLK__I2C1_SCL 0x4001b8b0
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MX6UL_PAD_CSI_MCLK__I2C1_SDA 0x4001b8b0
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>;
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};
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pinctrl_pwm4: pwm4grp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO05__PWM4_OUT 0x110b0
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>;
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};
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pinctrl_rtc: rtcgrp {
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fsl,pins = <
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MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x1b0b0 /* RTC alarm IRQ */
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
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MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
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>;
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};
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pinctrl_uart5: uart5grp {
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fsl,pins = <
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MX6UL_PAD_CSI_DATA00__UART5_DCE_TX 0x1b0b1
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MX6UL_PAD_CSI_DATA01__UART5_DCE_RX 0x1b0b1
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MX6UL_PAD_GPIO1_IO09__UART5_DCE_CTS 0x1b0b1
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MX6UL_PAD_GPIO1_IO08__UART5_DCE_RTS 0x1b0b1
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>;
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};
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pinctrl_usb_otg1_id: usbotg1idgrp {
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fsl,pins = <
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MX6UL_PAD_UART3_TX_DATA__ANATOP_OTG1_ID 0x17059
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
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MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x17059
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MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
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MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
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MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
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MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
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>;
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};
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pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
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fsl,pins = <
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MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
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MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
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MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
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MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
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MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
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MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
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>;
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};
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pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
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fsl,pins = <
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MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
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MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
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MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
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MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
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MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
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MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
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>;
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};
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pinctrl_usdhc1_gpio: usdhc1-gpiogrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO00__GPIO1_IO00 0x1b0b1 /* CD */
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>;
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};
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pinctrl_wdog: wdoggrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO01__WDOG1_WDOG_B 0x78b0
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>;
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};
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};
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&pwm4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm4>;
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status = "okay";
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};
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&snvs_pwrkey {
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status = "disabled";
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};
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&snvs_rtc {
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status = "disabled";
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};
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&tsc {
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/*
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* Conflics with wdog1 ext-reset-output & SD CD pins,
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* so we keep it disabled by default.
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*/
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status = "disabled";
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};
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/* Console UART */
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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/* ttymxc4 UART */
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&uart5 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart5>;
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uart-has-rtscts;
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status = "okay";
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};
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&usbotg1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb_otg1_id>;
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dr_mode = "otg";
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disable-over-current;
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srp-disable;
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hnp-disable;
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adp-disable;
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status = "okay";
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};
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&usbotg2 {
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dr_mode = "host";
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disable-over-current;
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status = "okay";
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};
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
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pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
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cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
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no-1-8-v;
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keep-power-in-suspend;
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wakeup-source;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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/*
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* To actually use ext-reset-output
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* connect pins J17.3 & J17.8 on the Concerto-Board
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*/
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fsl,ext-reset-output;
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};
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