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Append PCIe Gen5 limitations to xe_firmware document. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/20250506054835.3395220-4-raag.jadav@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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44 lines
891 B
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.. SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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========
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Firmware
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========
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Firmware Layout
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===============
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.. kernel-doc:: drivers/gpu/drm/xe/xe_uc_fw_abi.h
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:doc: CSS-based Firmware Layout
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.. kernel-doc:: drivers/gpu/drm/xe/xe_uc_fw_abi.h
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:doc: GSC-based Firmware Layout
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Write Once Protected Content Memory (WOPCM) Layout
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==================================================
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.. kernel-doc:: drivers/gpu/drm/xe/xe_wopcm.c
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:doc: Write Once Protected Content Memory (WOPCM) Layout
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GuC CTB Blob
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============
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.. kernel-doc:: drivers/gpu/drm/xe/xe_guc_ct.c
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:doc: GuC CTB Blob
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GuC Power Conservation (PC)
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===========================
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.. kernel-doc:: drivers/gpu/drm/xe/xe_guc_pc.c
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:doc: GuC Power Conservation (PC)
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PCIe Gen5 Limitations
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=====================
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.. kernel-doc:: drivers/gpu/drm/xe/xe_device_sysfs.c
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:doc: PCIe Gen5 Limitations
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Internal API
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============
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TODO
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