linux-loongson/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
Krzysztof Kozlowski 653e11eae2 dt-bindings: usb: Correct indentation and style in DTS example
DTS example in the bindings should be indented with 2- or 4-spaces and
aligned with opening '- |', so correct any differences like 3-spaces or
mixtures 2- and 4-spaces in one binding.

No functional changes here, but saves some comments during reviews of
new patches built on existing code.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Andrew Jeffery <andrew@codeconstruct.com.au> # aspeed,usb-vhub.yaml
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com> # ti,tusb73x0-pci.yaml
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> # brcm,bdc.yaml
Acked-by: Benjamin Bara <benjamin.bara@skidata.com> # cypress,hx3.yaml
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas
Link: https://lore.kernel.org/r/20250107131015.246461-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-01-11 17:02:29 +01:00

56 lines
1.4 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/ti,tusb73x0-pci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TUSB73x0 USB 3.0 xHCI Host Controller (PCIe)
maintainers:
- Francesco Dolcini <francesco.dolcini@toradex.com>
description:
TUSB73x0 USB 3.0 xHCI Host Controller via PCIe x1 Gen2 interface.
The TUSB7320 supports up to two downstream ports, the TUSB7340 supports up
to four downstream ports, both variants share the same PCI device ID.
properties:
compatible:
const: pci104c,8241
reg:
maxItems: 1
ti,pwron-active-high:
$ref: /schemas/types.yaml#/definitions/flag
description:
Configure the polarity of the PWRONx# signals. When this is present, the
PWRONx# pins are active high and their internal pull-down resistors are
disabled. When this is absent, the PWRONx# pins are active low (default)
and their internal pull-down resistors are enabled.
required:
- compatible
- reg
allOf:
- $ref: usb-xhci.yaml
additionalProperties: false
examples:
- |
pcie@0 {
reg = <0x0 0x1000>;
ranges = <0x02000000 0x0 0x100000 0x10000000 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
usb@0 {
compatible = "pci104c,8241";
reg = <0x0 0x0 0x0 0x0 0x0>;
ti,pwron-active-high;
};
};