mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-08-31 22:23:05 +00:00
75b98a2c35
Several Rockchip SoCs, such as the RK3576, can store calibration trim data for thermal sensors in OTP cells. This capability should be documented. Such a rockchip thermal sensor may reference cell handles that store both a chip-wide trim for all the sensors, as well as cell handles for each individual sensor channel pointing to that specific sensor's trim value. Additionally, the thermal sensor may optionally reference cells which store the base in terms of degrees celsius and decicelsius that the trim is relative to. Each SoC that implements this appears to have a slightly different combination of chip-wide trim, base, base fractional part and per-channel trim, so which ones do which is documented in the bindings. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250610-rk3576-tsadc-upstream-v6-4-b6e9efbf1015@collabora.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
164 lines
3.5 KiB
YAML
164 lines
3.5 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Temperature Sensor ADC (TSADC) on Rockchip SoCs
|
|
|
|
maintainers:
|
|
- Heiko Stuebner <heiko@sntech.de>
|
|
|
|
$ref: thermal-sensor.yaml#
|
|
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- rockchip,px30-tsadc
|
|
- rockchip,rk3228-tsadc
|
|
- rockchip,rk3288-tsadc
|
|
- rockchip,rk3328-tsadc
|
|
- rockchip,rk3368-tsadc
|
|
- rockchip,rk3399-tsadc
|
|
- rockchip,rk3568-tsadc
|
|
- rockchip,rk3576-tsadc
|
|
- rockchip,rk3588-tsadc
|
|
- rockchip,rv1108-tsadc
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
minItems: 2
|
|
maxItems: 2
|
|
|
|
clock-names:
|
|
items:
|
|
- const: tsadc
|
|
- const: apb_pclk
|
|
|
|
nvmem-cells:
|
|
items:
|
|
- description: cell handle to where the trim's base temperature is stored
|
|
- description:
|
|
cell handle to where the trim's tenths of Celsius base value is stored
|
|
|
|
nvmem-cell-names:
|
|
items:
|
|
- const: trim_base
|
|
- const: trim_base_frac
|
|
|
|
resets:
|
|
minItems: 1
|
|
maxItems: 3
|
|
|
|
reset-names:
|
|
minItems: 1
|
|
items:
|
|
- const: tsadc-apb
|
|
- const: tsadc
|
|
- const: tsadc-phy
|
|
|
|
"#address-cells":
|
|
const: 1
|
|
|
|
"#size-cells":
|
|
const: 0
|
|
|
|
"#thermal-sensor-cells":
|
|
const: 1
|
|
|
|
rockchip,grf:
|
|
description: The phandle of the syscon node for the general register file.
|
|
$ref: /schemas/types.yaml#/definitions/phandle
|
|
|
|
rockchip,hw-tshut-temp:
|
|
description: The hardware-controlled shutdown temperature value.
|
|
$ref: /schemas/types.yaml#/definitions/uint32
|
|
|
|
rockchip,hw-tshut-mode:
|
|
description: The hardware-controlled shutdown mode 0:CRU 1:GPIO.
|
|
$ref: /schemas/types.yaml#/definitions/uint32
|
|
enum: [0, 1]
|
|
|
|
rockchip,hw-tshut-polarity:
|
|
description: The hardware-controlled active polarity 0:LOW 1:HIGH.
|
|
$ref: /schemas/types.yaml#/definitions/uint32
|
|
enum: [0, 1]
|
|
|
|
patternProperties:
|
|
"@[0-9a-f]+$":
|
|
type: object
|
|
properties:
|
|
reg:
|
|
maxItems: 1
|
|
description: sensor ID, a.k.a. channel number
|
|
|
|
nvmem-cells:
|
|
items:
|
|
- description: handle of cell containing calibration data
|
|
|
|
nvmem-cell-names:
|
|
items:
|
|
- const: trim
|
|
|
|
required:
|
|
- reg
|
|
|
|
unevaluatedProperties: false
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- interrupts
|
|
- clocks
|
|
- clock-names
|
|
- resets
|
|
|
|
allOf:
|
|
- if:
|
|
not:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
const: rockchip,rk3568-tsadc
|
|
then:
|
|
properties:
|
|
nvmem-cells: false
|
|
nvmem-cell-names: false
|
|
- if:
|
|
not:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- rockchip,rk3568-tsadc
|
|
- rockchip,rk3576-tsadc
|
|
then:
|
|
patternProperties:
|
|
"@[0-9a-f]+$": false
|
|
|
|
unevaluatedProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
#include <dt-bindings/clock/rk3288-cru.h>
|
|
|
|
tsadc: tsadc@ff280000 {
|
|
compatible = "rockchip,rk3288-tsadc";
|
|
reg = <0xff280000 0x100>;
|
|
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
|
|
clock-names = "tsadc", "apb_pclk";
|
|
resets = <&cru SRST_TSADC>;
|
|
reset-names = "tsadc-apb";
|
|
#thermal-sensor-cells = <1>;
|
|
rockchip,hw-tshut-temp = <95000>;
|
|
rockchip,hw-tshut-mode = <0>;
|
|
rockchip,hw-tshut-polarity = <0>;
|
|
};
|