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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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cb931ee571
Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Lee Jones <lee@kernel.org> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20231108104343.24192-12-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
163 lines
4.3 KiB
YAML
163 lines
4.3 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung SoC I2S controller
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maintainers:
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- Krzysztof Kozlowski <krzk@kernel.org>
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- Sylwester Nawrocki <s.nawrocki@samsung.com>
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allOf:
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- $ref: dai-common.yaml#
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properties:
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compatible:
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description: |
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samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
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samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
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secondary FIFO, s/w reset control and internal mux for root clock
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source.
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samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
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playback, stereo channel capture, secondary FIFO using internal
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or external DMA, s/w reset control, internal mux for root clock
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source and 7.1 channel TDM support for playback; TDM (Time division
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multiplexing) is to allow transfer of multiple channel audio data on
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single data line.
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samsung,exynos7-i2s: with all the available features of Exynos5 I2S.
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Exynos7 I2S has 7.1 channel TDM support for capture, secondary FIFO
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with only external DMA and more number of root clock sampling
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frequencies.
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samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports
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stereo channels. Exynos7 I2S1 upgraded to 5.1 multichannel with
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slightly modified bit offsets.
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tesla,fsd-i2s: for 8/16/24bit stereo channel I2S for playback and
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capture, secondary FIFO using external DMA, s/w reset control,
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internal mux for root clock source with all root clock sampling
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frequencies supported by Exynos7 I2S and 7.1 channel TDM support
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for playback and capture TDM (Time division multiplexing) to allow
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transfer of multiple channel audio data on single data line.
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oneOf:
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- enum:
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- samsung,s3c6410-i2s
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- samsung,s5pv210-i2s
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- samsung,exynos5420-i2s
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- samsung,exynos7-i2s
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- samsung,exynos7-i2s1
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- tesla,fsd-i2s
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- items:
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- enum:
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- samsung,exynos5433-i2s
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- const: samsung,exynos7-i2s
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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reg:
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maxItems: 1
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dmas:
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minItems: 2
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maxItems: 3
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dma-names:
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oneOf:
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- items:
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- const: tx
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- const: rx
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- items:
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- const: tx
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- const: rx
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- const: tx-sec
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clocks:
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minItems: 1
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maxItems: 3
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clock-names:
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oneOf:
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- items:
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- const: iis
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- items: # for I2S0
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- const: iis
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- const: i2s_opclk0
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- const: i2s_opclk1
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- items: # for I2S1 and I2S2
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- const: iis
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- const: i2s_opclk0
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description: |
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"iis" is the I2S bus clock and i2s_opclk0, i2s_opclk1 are sources
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of the root clock. I2S0 has internal mux to select the source
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of root clock and I2S1 and I2S2 doesn't have any such mux.
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"#clock-cells":
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const: 1
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clock-output-names:
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deprecated: true
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oneOf:
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- items: # for I2S0
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- const: i2s_cdclk0
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- items: # for I2S1
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- const: i2s_cdclk1
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- items: # for I2S2
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- const: i2s_cdclk2
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description: Names of the CDCLK I2S output clocks.
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interrupts:
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maxItems: 1
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samsung,idma-addr:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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Internal DMA register base address of the audio
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subsystem (used in secondary sound source).
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power-domains:
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maxItems: 1
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"#sound-dai-cells":
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const: 1
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required:
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- compatible
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- reg
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- dmas
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- dma-names
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/exynos-audss-clk.h>
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i2s0: i2s@3830000 {
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compatible = "samsung,s5pv210-i2s";
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reg = <0x03830000 0x100>;
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dmas = <&pdma0 10>,
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<&pdma0 9>,
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<&pdma0 8>;
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dma-names = "tx", "rx", "tx-sec";
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clocks = <&clock_audss EXYNOS_I2S_BUS>,
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<&clock_audss EXYNOS_I2S_BUS>,
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<&clock_audss EXYNOS_SCLK_I2S>;
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clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
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#clock-cells = <1>;
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samsung,idma-addr = <0x03000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s0_bus>;
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#sound-dai-cells = <1>;
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};
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