linux-loongson/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml
Sheetal 628dafc476
dt-bindings: ASoC: Document Tegra264 APE support
Add Tegra264 compatible strings to APE subsystem device bindings:
- audio-graph-card: Due to different PLL clock rate.
- admaif: Due to 32 channels supported and register offset changes.
- i2s: Due to 32 channels supported and register offset changes.
- amx/adx: Due to 32 channels supported and register offset changes.
- asrc: Due to different ARAM address.
- ahub: Due to AHUB IPs number of instances updates.
- for future proofing the T264 compatibility is added for other device
  nodes.

These bindings enable the enhanced audio features of Tegra264
while maintaining compatibility with existing platforms.

Signed-off-by: Sheetal <sheetal@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250512051747.1026770-3-sheetal@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2025-05-22 11:02:04 +01:00

201 lines
5.3 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Audio Graph based Tegra sound card driver
description: |
This is based on generic audio graph card driver along with additional
customizations for Tegra platforms. It uses the same bindings with
additional standard clock DT bindings required for Tegra.
maintainers:
- Jon Hunter <jonathanh@nvidia.com>
- Sameer Pujar <spujar@nvidia.com>
allOf:
- $ref: audio-graph.yaml#
properties:
compatible:
enum:
- nvidia,tegra210-audio-graph-card
- nvidia,tegra186-audio-graph-card
- nvidia,tegra264-audio-graph-card
clocks:
minItems: 2
clock-names:
items:
- const: pll_a
- const: plla_out0
assigned-clocks:
minItems: 1
maxItems: 3
assigned-clock-parents:
minItems: 1
maxItems: 3
assigned-clock-rates:
minItems: 1
maxItems: 3
interconnects:
items:
- description: APE read memory client
- description: APE write memory client
interconnect-names:
items:
- const: dma-mem # read
- const: write
iommus:
maxItems: 1
required:
- clocks
- clock-names
- assigned-clocks
- assigned-clock-parents
unevaluatedProperties: false
examples:
- |
#include<dt-bindings/clock/tegra210-car.h>
tegra_sound {
compatible = "nvidia,tegra210-audio-graph-card";
clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
<&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
clock-names = "pll_a", "plla_out0";
assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
<&tegra_car TEGRA210_CLK_PLL_A_OUT0>,
<&tegra_car TEGRA210_CLK_EXTERN1>;
assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
assigned-clock-rates = <368640000>, <49152000>, <12288000>;
dais = /* FE */
<&admaif1_port>,
/* Router */
<&xbar_i2s1_port>,
/* I/O DAP Ports */
<&i2s1_port>;
label = "jetson-tx1-ape";
};
// The ports are defined for AHUB and its child devices.
ahub@702d0800 {
compatible = "nvidia,tegra210-ahub";
reg = <0x702d0800 0x800>;
clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
clock-names = "ahub";
assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x702d0000 0x702d0000 0x0000e400>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0x0>;
xbar_admaif1_ep: endpoint {
remote-endpoint = <&admaif1_ep>;
};
};
// ...
xbar_i2s1_port: port@a {
reg = <0xa>;
xbar_i2s1_ep: endpoint {
remote-endpoint = <&i2s1_cif_ep>;
};
};
};
admaif@702d0000 {
compatible = "nvidia,tegra210-admaif";
reg = <0x702d0000 0x800>;
dmas = <&adma 1>, <&adma 1>,
<&adma 2>, <&adma 2>,
<&adma 3>, <&adma 3>,
<&adma 4>, <&adma 4>,
<&adma 5>, <&adma 5>,
<&adma 6>, <&adma 6>,
<&adma 7>, <&adma 7>,
<&adma 8>, <&adma 8>,
<&adma 9>, <&adma 9>,
<&adma 10>, <&adma 10>;
dma-names = "rx1", "tx1",
"rx2", "tx2",
"rx3", "tx3",
"rx4", "tx4",
"rx5", "tx5",
"rx6", "tx6",
"rx7", "tx7",
"rx8", "tx8",
"rx9", "tx9",
"rx10", "tx10";
ports {
#address-cells = <1>;
#size-cells = <0>;
admaif1_port: port@0 {
reg = <0x0>;
admaif1_ep: endpoint {
remote-endpoint = <&xbar_admaif1_ep>;
};
};
// More ADMAIF ports to follow
};
};
i2s@702d1000 {
compatible = "nvidia,tegra210-i2s";
clocks = <&tegra_car TEGRA210_CLK_I2S0>;
clock-names = "i2s";
assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
assigned-clock-rates = <1536000>;
reg = <0x702d1000 0x100>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0x0>;
i2s1_cif_ep: endpoint {
remote-endpoint = <&xbar_i2s1_ep>;
};
};
i2s1_port: port@1 {
reg = <0x1>;
i2s1_dap: endpoint {
dai-format = "i2s";
};
};
};
};
};
...