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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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2e4c003b36
Add a DT schema for describing nau8325 audio amplifiers. The key features are as follows: - Low SPK_VDD Quiescent Current - Gain Setting with 2-wire interface - Powerful Stereo Class-D Amplifier - Low Output Noise - Low Current Shutdown Mode - Click-and Pop Suppression More resources : https://www.nuvoton.com/products/smart-home-audio/audio-amplifiers/class-d-series/nau8325yg/ Signed-off-by: Seven Lee <wtli@nuvoton.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://msgid.link/r/20240327075755.3410381-2-wtli@nuvoton.com Signed-off-by: Mark Brown <broonie@kernel.org>
81 lines
2.2 KiB
YAML
81 lines
2.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/nuvoton,nau8325.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NAU8325 audio Amplifier
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maintainers:
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- Seven Lee <WTLI@nuvoton.com>
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allOf:
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- $ref: dai-common.yaml#
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properties:
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compatible:
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const: nuvoton,nau8325
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reg:
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maxItems: 1
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nuvoton,vref-impedance-ohms:
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description:
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The vref impedance to be used in ohms. Middle of voltage enables
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Tie-Off selection options. Due to the high impedance of the VREF
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pin, it is important to use a low-leakage capacitor.
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enum: [0, 25000, 125000, 2500]
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nuvoton,dac-vref-microvolt:
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description:
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The DAC vref to be used in voltage. DAC reference voltage setting. Can
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be used for minor tuning of the output level. Since the VDDA is range
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between 1.62 to 1.98 voltage, the typical value for design is 1.8V. After
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the minor tuning, the final microvolt are as the below.
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enum: [1800000, 2700000, 2880000, 3060000]
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nuvoton,alc-enable:
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description:
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Enable digital automatic level control (ALC) function.
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type: boolean
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nuvoton,clock-detection-disable:
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description:
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When clock detection is enabled, it will detect whether MCLK
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and FS are within the range. MCLK range is from 2.048MHz to 24.576MHz.
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FS range is from 8kHz to 96kHz. And also needs to detect the ratio
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MCLK_SRC/LRCK of 256, 400 or 500, and needs to detect the BCLK
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to make sure data is present. There needs to be at least 8 BCLK
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cycles per Frame Sync.
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type: boolean
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nuvoton,clock-det-data:
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description:
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Request clock detection to require 2048 non-zero samples before enabling
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the audio paths. If set then non-zero samples is required, otherwise it
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doesn't matter.
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type: boolean
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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codec@21 {
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compatible = "nuvoton,nau8325";
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reg = <0x21>;
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nuvoton,vref-impedance-ohms = <125000>;
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nuvoton,dac-vref-microvolt = <2880000>;
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nuvoton,alc-enable;
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nuvoton,clock-det-data;
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};
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};
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