linux-loongson/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml
Claudiu Beznea 111287aa60 dt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/G3S SoC
Document RZ/G3S (R9A08G045) SYSC bindings. The SYSC block found on the
RZ/G3S SoC is similar to the one found on the RZ/G2UL.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230912045157.177966-4-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-09-18 09:50:30 +02:00

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YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/renesas/renesas,rzg2l-sysc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/{G2L,V2L} System Controller (SYSC)
maintainers:
- Geert Uytterhoeven <geert+renesas@glider.be>
description:
The RZ/{G2L,V2L}-alike System Controller (SYSC) performs system control of
the LSI and supports following functions,
- External terminal state capture function
- 34-bit address space access function
- Low power consumption control
- WDT stop control
properties:
compatible:
enum:
- renesas,r9a07g043-sysc # RZ/G2UL and RZ/Five
- renesas,r9a07g044-sysc # RZ/G2{L,LC}
- renesas,r9a07g054-sysc # RZ/V2L
- renesas,r9a08g045-sysc # RZ/G3S
reg:
maxItems: 1
interrupts:
items:
- description: CA55/CM33 Sleep/Software Standby Mode request interrupt
- description: CA55 Software Standby Mode release request interrupt
- description: CM33 Software Standby Mode release request interrupt
- description: CA55 ACE Asynchronous Bridge Master/Slave interface deny request interrupt
interrupt-names:
items:
- const: lpm_int
- const: ca55stbydone_int
- const: cm33stbyr_int
- const: ca55_deny
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
sysc: system-controller@11020000 {
compatible = "renesas,r9a07g044-sysc";
reg = <0x11020000 0x10000>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "lpm_int", "ca55stbydone_int", "cm33stbyr_int",
"ca55_deny";
};