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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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dc7af24bd6
Add the RZ/V2N (R9A09G056) variant to the existing RZ/V2H(P) System Controller (SYS) binding, as both IPs are very similar. However, they have different SoC IDs, and the RZ/V2N does not have PCIE1 configuration registers, unlike the RZ/V2H(P) SYS IP. To handle these differences, introduce a new compatible string `renesas,r9a09g056-sys`. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250407191628.323613-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
56 lines
1.2 KiB
YAML
56 lines
1.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/renesas/renesas,r9a09g057-sys.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RZ/V2H(P) System Controller (SYS)
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maintainers:
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- Geert Uytterhoeven <geert+renesas@glider.be>
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description: |
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The RZ/V2H(P) SYS (System Controller) controls the overall
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configuration of the LSI and supports the following functions,
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- Trust zone control
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- Extend access by specific masters to address beyond 4GB space
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- GBETH configuration
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- Control of settings and states of SRAM/PCIe/CM33/CA55/CR8/xSPI/ADC/TSU
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- LSI version
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- WDT stop control
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- General registers
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properties:
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compatible:
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items:
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- enum:
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- renesas,r9a09g047-sys # RZ/G3E
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- renesas,r9a09g056-sys # RZ/V2N
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- renesas,r9a09g057-sys # RZ/V2H
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- resets
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additionalProperties: false
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examples:
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- |
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sys: system-controller@10430000 {
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compatible = "renesas,r9a09g057-sys";
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reg = <0x10430000 0x10000>;
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clocks = <&cpg 1>;
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resets = <&cpg 1>;
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};
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