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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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4cfa8c7e95
i.MX7 has the following anatop regulators: vdd1p0d and vdd1p2. i.MX6SX has the following anatop regulators: vddpcie. Add them to the allowed patternProperties. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
147 lines
4.3 KiB
YAML
147 lines
4.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/imx/fsl,imx-anatop.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ANATOP register
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maintainers:
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- Shawn Guo <shawnguo@kernel.org>
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- Sascha Hauer <s.hauer@pengutronix.de>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- fsl,imx6sl-anatop
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- fsl,imx6sll-anatop
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- fsl,imx6sx-anatop
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- fsl,imx6ul-anatop
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- fsl,imx7d-anatop
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- const: fsl,imx6q-anatop
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- const: syscon
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- const: simple-mfd
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- items:
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- const: fsl,imx6q-anatop
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- const: syscon
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- const: simple-mfd
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: Temperature sensor event
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- description: Brown-out event on either of the support regulators
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- description: Brown-out event on either the core, gpu or soc regulators
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minItems: 2
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tempmon:
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type: object
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unevaluatedProperties: false
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$ref: /schemas/thermal/imx-thermal.yaml
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patternProperties:
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"regulator-((1p1)|(2p5)|(3p0)|(vdd1p0d)|(vdd1p2)|(vddcore)|(vddpcie)|(vddpu)|(vddsoc))$":
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type: object
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unevaluatedProperties: false
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$ref: /schemas/regulator/anatop-regulator.yaml
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required:
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- compatible
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- reg
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,imx7d-anatop
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then:
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properties:
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interrupts:
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maxItems: 2
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else:
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properties:
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interrupts:
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minItems: 3
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maxItems: 3
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx6ul-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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anatop: anatop@20c8000 {
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compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
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"syscon", "simple-mfd";
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reg = <0x020c8000 0x1000>;
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
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reg_3p0: regulator-3p0 {
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compatible = "fsl,anatop-regulator";
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regulator-name = "vdd3p0";
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regulator-min-microvolt = <2625000>;
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regulator-max-microvolt = <3400000>;
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anatop-reg-offset = <0x120>;
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anatop-vol-bit-shift = <8>;
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anatop-vol-bit-width = <5>;
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anatop-min-bit-val = <0>;
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anatop-min-voltage = <2625000>;
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anatop-max-voltage = <3400000>;
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anatop-enable-bit = <0>;
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};
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reg_arm: regulator-vddcore {
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compatible = "fsl,anatop-regulator";
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regulator-name = "cpu";
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regulator-min-microvolt = <725000>;
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regulator-max-microvolt = <1450000>;
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regulator-always-on;
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anatop-reg-offset = <0x140>;
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anatop-vol-bit-shift = <0>;
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anatop-vol-bit-width = <5>;
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anatop-delay-reg-offset = <0x170>;
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anatop-delay-bit-shift = <24>;
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anatop-delay-bit-width = <2>;
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anatop-min-bit-val = <1>;
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anatop-min-voltage = <725000>;
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anatop-max-voltage = <1450000>;
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};
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reg_soc: regulator-vddsoc {
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compatible = "fsl,anatop-regulator";
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regulator-name = "vddsoc";
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regulator-min-microvolt = <725000>;
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regulator-max-microvolt = <1450000>;
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regulator-always-on;
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anatop-reg-offset = <0x140>;
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anatop-vol-bit-shift = <18>;
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anatop-vol-bit-width = <5>;
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anatop-delay-reg-offset = <0x170>;
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anatop-delay-bit-shift = <28>;
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anatop-delay-bit-width = <2>;
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anatop-min-bit-val = <1>;
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anatop-min-voltage = <725000>;
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anatop-max-voltage = <1450000>;
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};
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tempmon: tempmon {
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compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
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interrupt-parent = <&gpc>;
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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fsl,tempmon = <&anatop>;
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nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
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nvmem-cell-names = "calib", "temp_grade";
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clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
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#thermal-sensor-cells = <0>;
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};
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};
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