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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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Convert binding doc newwork.txt to yaml format. HDLC part: - Convert to "fsl,ucc-hdlc.yaml". - Add missed reg and interrupt property. - Update example to pass build. ethernet part: - Convert to net/fsl,cpm-enet.yaml - Add 0x in example, which should be hex value - Add ref to ethernet-controller.yaml mdio part: - Convert to net/fsl,cpm-mdio.yaml - Add 0x in example, which should be hex value - Add ref to mdio.yaml Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Jakub Kicinski <kuba@kernel.org> Link: https://lore.kernel.org/r/20240812165041.3815525-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
141 lines
3.3 KiB
YAML
141 lines
3.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: High-Level Data Link Control(HDLC)
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description: HDLC part in Universal communication controllers (UCCs)
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maintainers:
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- Frank Li <Frank.Li@nxp.com>
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properties:
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compatible:
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const: fsl,ucc-hdlc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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cell-index:
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$ref: /schemas/types.yaml#/definitions/uint32
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rx-clock-name:
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$ref: /schemas/types.yaml#/definitions/string
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oneOf:
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- pattern: "^brg([0-9]|1[0-6])$"
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- pattern: "^clk([0-9]|1[0-9]|2[0-4])$"
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tx-clock-name:
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$ref: /schemas/types.yaml#/definitions/string
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oneOf:
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- pattern: "^brg([0-9]|1[0-6])$"
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- pattern: "^clk([0-9]|1[0-9]|2[0-4])$"
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fsl,tdm-interface:
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$ref: /schemas/types.yaml#/definitions/flag
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description: Specify that hdlc is based on tdm-interface
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fsl,rx-sync-clock:
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$ref: /schemas/types.yaml#/definitions/string
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description: rx-sync
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enum:
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- none
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- rsync_pin
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- brg9
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- brg10
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- brg11
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- brg13
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- brg14
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- brg15
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fsl,tx-sync-clock:
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$ref: /schemas/types.yaml#/definitions/string
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description: tx-sync
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enum:
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- none
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- tsync_pin
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- brg9
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- brg10
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- brg11
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- brg13
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- brg14
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- brg15
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fsl,tdm-framer-type:
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$ref: /schemas/types.yaml#/definitions/string
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description: required for tdm interface
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enum: [e1, t1]
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fsl,tdm-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: number of TDM ID
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fsl,tx-timeslot-mask:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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required for tdm interface.
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time slot mask for TDM operation. Indicates which time
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slots used for transmitting and receiving.
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fsl,rx-timeslot-mask:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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required for tdm interface.
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time slot mask for TDM operation. Indicates which time
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slots used for transmitting and receiving.
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fsl,siram-entry-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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required for tdm interface
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Must be 0,2,4...64. the number of TDM entry.
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fsl,tdm-internal-loopback:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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optional for tdm interface
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Internal loopback connecting on TDM layer.
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fsl,hmask:
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$ref: /schemas/types.yaml#/definitions/uint16
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description: |
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HDLC address recognition. Set to zero to disable
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address filtering of packets:
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fsl,hmask = /bits/ 16 <0x0000>;
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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communication@2000 {
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compatible = "fsl,ucc-hdlc";
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reg = <0x2000 0x200>;
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rx-clock-name = "clk8";
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tx-clock-name = "clk9";
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fsl,rx-sync-clock = "rsync_pin";
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fsl,tx-sync-clock = "tsync_pin";
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fsl,tx-timeslot-mask = <0xfffffffe>;
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fsl,rx-timeslot-mask = <0xfffffffe>;
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fsl,tdm-framer-type = "e1";
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fsl,tdm-id = <0>;
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fsl,siram-entry-id = <0>;
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fsl,tdm-interface;
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};
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- |
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communication@2000 {
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compatible = "fsl,ucc-hdlc";
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reg = <0x2000 0x200>;
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rx-clock-name = "brg1";
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tx-clock-name = "brg1";
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};
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