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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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The Tegra UTC (UART Trace Controller) allows multiple clients within the Tegra SoC to share a physical UART interface. It supports up to 16 clients. Each client operates as an independent UART endpoint with a dedicated interrupt and 128-character TX/RX FIFOs. Add device tree binding documentation for the Tegra UTC client. Signed-off-by: Kartik Rajput <kkartik@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250213125612.4705-2-kkartik@nvidia.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
74 lines
1.7 KiB
YAML
74 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/serial/nvidia,tegra264-utc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra UTC (UART Trace Controller) client
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maintainers:
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- Kartik Rajput <kkartik@nvidia.com>
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- Thierry Reding <thierry.reding@gmail.com>
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- Jonathan Hunter <jonathanh@nvidia.com>
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description:
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Represents a client interface of the Tegra UTC (UART Trace Controller). The
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Tegra UTC allows multiple clients within the Tegra SoC to share a physical
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UART interface. It supports up to 16 clients. Each client operates as an
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independent UART endpoint with a dedicated interrupt and 128-character TX/RX
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FIFOs.
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The Tegra UTC clients use 8-N-1 configuration and operates on a baudrate
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configured by the bootloader at the controller level.
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allOf:
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- $ref: serial.yaml#
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properties:
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compatible:
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const: nvidia,tegra264-utc
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reg:
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items:
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- description: TX region.
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- description: RX region.
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reg-names:
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items:
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- const: tx
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- const: rx
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interrupts:
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maxItems: 1
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tx-threshold:
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minimum: 1
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maximum: 128
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rx-threshold:
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minimum: 1
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maximum: 128
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- tx-threshold
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- rx-threshold
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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tegra_utc: serial@c4e0000 {
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compatible = "nvidia,tegra264-utc";
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reg = <0xc4e0000 0x8000>, <0xc4e8000 0x8000>;
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reg-names = "tx", "rx";
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interrupts = <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
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tx-threshold = <4>;
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rx-threshold = <4>;
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};
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