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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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d62f45b5e9
This commit adds a 25MHz reference clock and clock-cell properties to the NPCM reset document. The addition is necessitated by the integration of the NPCM8xx clock auxiliary bus device into the NPCM reset driver. The inclusion of the NPCM8xx clock properties in the reset document is crucial as the reset block also serves as a clock provider for the NPCM8xx clock. This enhancement is intended to facilitate the use of the NPCM8xx clock driver. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20240912191038.981105-2-tmaimon77@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
77 lines
1.6 KiB
YAML
77 lines
1.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/reset/nuvoton,npcm750-reset.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Nuvoton NPCM Reset controller
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maintainers:
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- Tomer Maimon <tmaimon77@gmail.com>
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properties:
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compatible:
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enum:
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- nuvoton,npcm750-reset # Poleg NPCM7XX SoC
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- nuvoton,npcm845-reset # Arbel NPCM8XX SoC
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reg:
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maxItems: 1
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'#reset-cells':
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const: 2
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'#clock-cells':
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const: 1
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clocks:
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items:
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- description: specify external 25MHz reference clock.
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nuvoton,sysgcr:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: a phandle to access GCR registers.
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nuvoton,sw-reset-number:
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 1
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maximum: 4
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description: |
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Contains the software reset number to restart the SoC.
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If not specified, software reset is disabled.
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required:
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- compatible
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- reg
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- '#reset-cells'
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- nuvoton,sysgcr
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if:
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properties:
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compatible:
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contains:
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enum:
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- nuvoton,npcm845-reset
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then:
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required:
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- '#clock-cells'
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
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rstc: rstc@f0801000 {
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compatible = "nuvoton,npcm750-reset";
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reg = <0xf0801000 0x70>;
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#reset-cells = <2>;
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nuvoton,sysgcr = <&gcr>;
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nuvoton,sw-reset-number = <2>;
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};
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// Specifying reset lines connected to IP NPCM7XX modules
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spi0: spi {
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resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>;
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};
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