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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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Add Loongson PWM controller binding with DT schema format using json-schema. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://lore.kernel.org/r/57e0cbd4b7ce37da94094205e28a2ec2256c7175.1743403075.git.zhoubinbin@loongson.cn Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
68 lines
1.6 KiB
YAML
68 lines
1.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pwm/loongson,ls7a-pwm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Loongson PWM Controller
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maintainers:
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- Binbin Zhou <zhoubinbin@loongson.cn>
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description:
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The Loongson PWM has one pulse width output signal and one pulse input
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signal to be measured.
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It can be found on Loongson-2K series cpus and Loongson LS7A bridge chips.
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allOf:
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- $ref: pwm.yaml#
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properties:
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compatible:
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oneOf:
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- const: loongson,ls7a-pwm
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- items:
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- enum:
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- loongson,ls2k0500-pwm
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- loongson,ls2k1000-pwm
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- loongson,ls2k2000-pwm
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- const: loongson,ls7a-pwm
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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'#pwm-cells':
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description:
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The first cell must have a value of 0, which specifies the PWM output signal;
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The second cell is the period in nanoseconds;
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The third cell flag supported by this binding is PWM_POLARITY_INVERTED.
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const: 3
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/loongson,ls2k-clk.h>
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pwm@1fe22000 {
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compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm";
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reg = <0x1fe22000 0x10>;
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interrupt-parent = <&liointc0>;
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interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk LOONGSON2_APB_CLK>;
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#pwm-cells = <3>;
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};
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