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dd1051f932
Convert the hisilicon,hi3798cv200-combphy binding to DT schema format. Drop the example as arm/hisilicon/controller/hi3798cv200-perictrl.yaml already contains an example of this binding. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240711152313.2364383-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
57 lines
1.2 KiB
YAML
57 lines
1.2 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/hisilicon,hi3798cv200-combphy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: HiSilicon STB PCIE/SATA/USB3 PHY
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maintainers:
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- Shawn Guo <shawn.guo@linaro.org>
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properties:
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compatible:
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const: hisilicon,hi3798cv200-combphy
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reg:
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maxItems: 1
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'#phy-cells':
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description: The cell contains the PHY mode
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const: 1
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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hisilicon,fixed-mode:
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description: If the phy device doesn't support mode select but a fixed mode
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setting, the property should be present to specify the particular mode.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 1, 2, 4] # SATA, PCIE, USB3
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hisilicon,mode-select-bits:
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description: If the phy device support mode select, this property should be
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present to specify the register bits in peripheral controller.
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items:
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- description: register_offset
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- description: bit shift
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- description: bit mask
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required:
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- compatible
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- reg
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- '#phy-cells'
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- clocks
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- resets
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oneOf:
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- required: ['hisilicon,fixed-mode']
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- required: ['hisilicon,mode-select-bits']
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additionalProperties: false
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...
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