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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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a202f09e3e
The PCIe controller on the SG2044 is Designware based with custom app registers. Add binding document for SG2044 PCIe host controller. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250504004420.202685-2-inochiama@gmail.com
123 lines
2.9 KiB
YAML
123 lines
2.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/sophgo,sg2044-pcie.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: DesignWare based PCIe Root Complex controller on Sophgo SoCs
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maintainers:
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- Inochi Amaoto <inochiama@gmail.com>
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description:
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SG2044 SoC PCIe Root Complex controller is based on the Synopsys DesignWare
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PCIe IP and thus inherits all the common properties defined in
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snps,dw-pcie.yaml.
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allOf:
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- $ref: /schemas/pci/pci-host-bridge.yaml#
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- $ref: /schemas/pci/snps,dw-pcie.yaml#
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properties:
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compatible:
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const: sophgo,sg2044-pcie
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reg:
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items:
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- description: Data Bus Interface (DBI) registers
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- description: iATU registers
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- description: Config registers
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- description: Sophgo designed configuration registers
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reg-names:
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items:
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- const: dbi
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- const: atu
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- const: config
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- const: app
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clocks:
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items:
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- description: core clk
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clock-names:
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items:
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- const: core
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interrupt-controller:
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description: Interrupt controller node for handling legacy PCI interrupts.
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type: object
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properties:
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"#address-cells":
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const: 0
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"#interrupt-cells":
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const: 1
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interrupt-controller: true
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interrupts:
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items:
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- description: combined legacy interrupt
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required:
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- "#address-cells"
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- "#interrupt-cells"
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- interrupt-controller
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- interrupts
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additionalProperties: false
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msi-parent: true
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ranges:
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maxItems: 5
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required:
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- compatible
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- reg
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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pcie@6c00400000 {
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compatible = "sophgo,sg2044-pcie";
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reg = <0x6c 0x00400000 0x0 0x00001000>,
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<0x6c 0x00700000 0x0 0x00004000>,
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<0x40 0x00000000 0x0 0x00001000>,
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<0x6c 0x00780c00 0x0 0x00000400>;
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reg-names = "dbi", "atu", "config", "app";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x00 0xff>;
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clocks = <&clk 0>;
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clock-names = "core";
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device_type = "pci";
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linux,pci-domain = <0>;
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msi-parent = <&msi>;
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ranges = <0x01000000 0x0 0x00000000 0x40 0x10000000 0x0 0x00200000>,
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<0x42000000 0x0 0x00000000 0x0 0x00000000 0x0 0x04000000>,
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<0x02000000 0x0 0x04000000 0x0 0x04000000 0x0 0x04000000>,
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<0x43000000 0x42 0x00000000 0x42 0x00000000 0x2 0x00000000>,
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<0x03000000 0x41 0x00000000 0x41 0x00000000 0x1 0x00000000>;
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interrupt-controller {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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interrupt-parent = <&intc>;
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interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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};
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...
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